1 From b085b6233065b1e5145fbf93d75264b2042c0eb5 Mon Sep 17 00:00:00 2001
2 From: Xingyu Wu <xingyu.wu@starfivetech.com>
3 Date: Tue, 14 Mar 2023 21:24:37 +0800
4 Subject: [PATCH 106/122] riscv: dts: starfive: jh7100: Add watchdog node
6 Add watchdog node for the StarFive JH7100 RISC-V SoC.
8 Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
9 Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
11 arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 ++++++++++
12 1 file changed, 10 insertions(+)
14 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
15 +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
22 + compatible = "starfive,jh7100-wdt";
23 + reg = <0x0 0x12480000 0x0 0x10000>;
24 + clocks = <&clkgen JH7100_CLK_WDTIMER_APB>,
25 + <&clkgen JH7100_CLK_WDT_CORE>;
26 + clock-names = "apb", "core";
27 + resets = <&rstgen JH7100_RSTN_WDTIMER_APB>,
28 + <&rstgen JH7100_RSTN_WDT>;