target/linux/starfive/patches-6.1/0011-reset-starfive-Rename-jh7100-to-jh71x0-for-the-commo.patch

   1 From 798b9b4681be53ddbf1d8db8a88ff19aaaca500f Mon Sep 17 00:00:00 2001
   2 From: Emil Renner Berthing <kernel@esmil.dk>
   3 Date: Sat, 1 Apr 2023 19:19:23 +0800
   4 Subject: [PATCH 011/122] reset: starfive: Rename "jh7100" to "jh71x0" for the
   5  common code
   6
   7 For the common code will be shared with the StarFive JH7110 SoC.
   8
   9 Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
  10 Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
  11 Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
  12 Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
  13 Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
  14 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
  15 ---
  16  .../reset/starfive/reset-starfive-jh7100.c    |  2 +-
  17  .../reset/starfive/reset-starfive-jh71x0.c    | 50 +++++++++----------
  18  .../reset/starfive/reset-starfive-jh71x0.h    |  2 +-
  19  3 files changed, 27 insertions(+), 27 deletions(-)
  20
  21 --- a/drivers/reset/starfive/reset-starfive-jh7100.c
  22 +++ b/drivers/reset/starfive/reset-starfive-jh7100.c
  23 @@ -51,7 +51,7 @@ static int __init jh7100_reset_probe(str
  24         if (IS_ERR(base))
  25                 return PTR_ERR(base);
  26
  27 -       return reset_starfive_jh7100_register(&pdev->dev, pdev->dev.of_node,
  28 +       return reset_starfive_jh71x0_register(&pdev->dev, pdev->dev.of_node,
  29                                               base + JH7100_RESET_ASSERT0,
  30                                               base + JH7100_RESET_STATUS0,
  31                                               jh7100_reset_asserted,
  32 --- a/drivers/reset/starfive/reset-starfive-jh71x0.c
  33 +++ b/drivers/reset/starfive/reset-starfive-jh71x0.c
  34 @@ -1,6 +1,6 @@
  35  // SPDX-License-Identifier: GPL-2.0-or-later
  36  /*
  37 - * Reset driver for the StarFive JH7100 SoC
  38 + * Reset driver for the StarFive JH71X0 SoCs
  39   *
  40   * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
  41   */
  42 @@ -15,7 +15,7 @@
  43
  44  #include "reset-starfive-jh71x0.h"
  45
  46 -struct jh7100_reset {
  47 +struct jh71x0_reset {
  48         struct reset_controller_dev rcdev;
  49         /* protect registers against concurrent read-modify-write */
  50         spinlock_t lock;
  51 @@ -24,16 +24,16 @@ struct jh7100_reset {
  52         const u64 *asserted;
  53  };
  54
  55 -static inline struct jh7100_reset *
  56 -jh7100_reset_from(struct reset_controller_dev *rcdev)
  57 +static inline struct jh71x0_reset *
  58 +jh71x0_reset_from(struct reset_controller_dev *rcdev)
  59  {
  60 -       return container_of(rcdev, struct jh7100_reset, rcdev);
  61 +       return container_of(rcdev, struct jh71x0_reset, rcdev);
  62  }
  63
  64 -static int jh7100_reset_update(struct reset_controller_dev *rcdev,
  65 +static int jh71x0_reset_update(struct reset_controller_dev *rcdev,
  66                                unsigned long id, bool assert)
  67  {
  68 -       struct jh7100_reset *data = jh7100_reset_from(rcdev);
  69 +       struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
  70         unsigned long offset = BIT_ULL_WORD(id);
  71         u64 mask = BIT_ULL_MASK(id);
  72         void __iomem *reg_assert = data->assert + offset * sizeof(u64);
  73 @@ -62,34 +62,34 @@ static int jh7100_reset_update(struct re
  74         return ret;
  75  }
  76
  77 -static int jh7100_reset_assert(struct reset_controller_dev *rcdev,
  78 +static int jh71x0_reset_assert(struct reset_controller_dev *rcdev,
  79                                unsigned long id)
  80  {
  81 -       return jh7100_reset_update(rcdev, id, true);
  82 +       return jh71x0_reset_update(rcdev, id, true);
  83  }
  84
  85 -static int jh7100_reset_deassert(struct reset_controller_dev *rcdev,
  86 +static int jh71x0_reset_deassert(struct reset_controller_dev *rcdev,
  87                                  unsigned long id)
  88  {
  89 -       return jh7100_reset_update(rcdev, id, false);
  90 +       return jh71x0_reset_update(rcdev, id, false);
  91  }
  92
  93 -static int jh7100_reset_reset(struct reset_controller_dev *rcdev,
  94 +static int jh71x0_reset_reset(struct reset_controller_dev *rcdev,
  95                               unsigned long id)
  96  {
  97         int ret;
  98
  99 -       ret = jh7100_reset_assert(rcdev, id);
 100 +       ret = jh71x0_reset_assert(rcdev, id);
 101         if (ret)
 102                 return ret;
 103
 104 -       return jh7100_reset_deassert(rcdev, id);
 105 +       return jh71x0_reset_deassert(rcdev, id);
 106  }
 107
 108 -static int jh7100_reset_status(struct reset_controller_dev *rcdev,
 109 +static int jh71x0_reset_status(struct reset_controller_dev *rcdev,
 110                                unsigned long id)
 111  {
 112 -       struct jh7100_reset *data = jh7100_reset_from(rcdev);
 113 +       struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
 114         unsigned long offset = BIT_ULL_WORD(id);
 115         u64 mask = BIT_ULL_MASK(id);
 116         void __iomem *reg_status = data->status + offset * sizeof(u64);
 117 @@ -98,25 +98,25 @@ static int jh7100_reset_status(struct re
 118         return !((value ^ data->asserted[offset]) & mask);
 119  }
 120
 121 -static const struct reset_control_ops jh7100_reset_ops = {
 122 -       .assert         = jh7100_reset_assert,
 123 -       .deassert       = jh7100_reset_deassert,
 124 -       .reset          = jh7100_reset_reset,
 125 -       .status         = jh7100_reset_status,
 126 +static const struct reset_control_ops jh71x0_reset_ops = {
 127 +       .assert         = jh71x0_reset_assert,
 128 +       .deassert       = jh71x0_reset_deassert,
 129 +       .reset          = jh71x0_reset_reset,
 130 +       .status         = jh71x0_reset_status,
 131  };
 132
 133 -int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
 134 +int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
 135                                    void __iomem *assert, void __iomem *status,
 136                                    const u64 *asserted, unsigned int nr_resets,
 137                                    struct module *owner)
 138  {
 139 -       struct jh7100_reset *data;
 140 +       struct jh71x0_reset *data;
 141
 142         data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
 143         if (!data)
 144                 return -ENOMEM;
 145
 146 -       data->rcdev.ops = &jh7100_reset_ops;
 147 +       data->rcdev.ops = &jh71x0_reset_ops;
 148         data->rcdev.owner = owner;
 149         data->rcdev.nr_resets = nr_resets;
 150         data->rcdev.dev = dev;
 151 @@ -129,4 +129,4 @@ int reset_starfive_jh7100_register(struc
 152
 153         return devm_reset_controller_register(dev, &data->rcdev);
 154  }
 155 -EXPORT_SYMBOL_GPL(reset_starfive_jh7100_register);
 156 +EXPORT_SYMBOL_GPL(reset_starfive_jh71x0_register);
 157 --- a/drivers/reset/starfive/reset-starfive-jh71x0.h
 158 +++ b/drivers/reset/starfive/reset-starfive-jh71x0.h
 159 @@ -6,7 +6,7 @@
 160  #ifndef __RESET_STARFIVE_JH71X0_H
 161  #define __RESET_STARFIVE_JH71X0_H
 162
 163 -int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
 164 +int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
 165                                    void __iomem *assert, void __iomem *status,
 166                                    const u64 *asserted, unsigned int nr_resets,
 167                                    struct module *owner);