8980f772e7459c8efdc317f7f5994fa0343f5ed6
[openwrt/staging/hauke.git] / target / linux / ath79 / dts / qca9563_glinet_gl-x1200.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 led-boot = &led_system;
11 led-failsafe = &led_system;
12 led-running = &led_system;
13 led-upgrade = &led_system;
14 label-mac-device = &eth0;
15 };
16
17 keys {
18 compatible = "gpio-keys";
19
20 pinctrl-names = "default";
21 pinctrl-0 = <&jtag_disable_pins>;
22
23 reset {
24 label = "reset";
25 linux,code = <KEY_RESTART>;
26 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
27 };
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led_system: system {
34 label = "red:system";
35 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
36 default-state = "keep";
37 };
38
39 wlan2g {
40 label = "green:wlan2g";
41 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
42 linux,default-trigger = "phy1tpt";
43 };
44
45 wlan5g {
46 label = "green:wlan5g";
47 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
48 linux,default-trigger = "phy0tpt";
49 };
50 };
51
52 gpio-export {
53 compatible = "gpio-export";
54
55 gpio_modem1_power {
56 gpio-export,name = "gl-x1200:4g1:power";
57 gpio-export,output = <0>;
58 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
59 };
60
61 gpio_modem2_power {
62 gpio-export,name = "gl-x1200:4g2:power";
63 gpio-export,output = <0>;
64 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
65 };
66 };
67 };
68
69 &spi {
70 status = "okay";
71
72 flash@0 {
73 compatible = "jedec,spi-nor";
74 reg = <0>;
75 spi-max-frequency = <25000000>;
76
77 nor_partitions: partitions {
78 compatible = "fixed-partitions";
79 #address-cells = <1>;
80 #size-cells = <1>;
81
82 partition@0 {
83 label = "u-boot";
84 reg = <0x000000 0x040000>;
85 read-only;
86 };
87
88 partition@40000 {
89 label = "u-boot-env";
90 reg = <0x040000 0x010000>;
91 };
92
93 partition@50000 {
94 label = "art";
95 reg = <0x050000 0x010000>;
96 read-only;
97
98 compatible = "nvmem-cells";
99 #address-cells = <1>;
100 #size-cells = <1>;
101
102 calibration_ath9k: calibration@1000 {
103 reg = <0x1000 0x440>;
104 };
105
106 calibration_ath10k: calibration@5000 {
107 reg = <0x5000 0x2f20>;
108 };
109
110 macaddr_art_0: macaddr@0 {
111 reg = <0x0 0x6>;
112 };
113
114 macaddr_art_1002: macaddr@1002 {
115 reg = <0x1002 0x6>;
116 };
117
118 macaddr_art_5006: macaddr@5006 {
119 reg = <0x5006 0x6>;
120 };
121 };
122
123 /* Firmware / Kernel flash type specific */
124 };
125 };
126
127 flash@1 {
128 compatible = "spi-nand";
129 reg = <1>;
130 spi-max-frequency = <25000000>;
131
132 partitions {
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
135 #size-cells = <1>;
136
137 nand_ubi: partition@0 {
138 label = "nand_ubi";
139 reg = <0x000000 0x8000000>;
140 };
141 };
142 };
143 };
144
145 &eth0 {
146 status = "okay";
147
148 phy-handle = <&phy0>;
149
150 nvmem-cells = <&macaddr_art_0>;
151 nvmem-cell-names = "mac-address";
152 };
153
154 &gpio {
155 usb_vbus {
156 gpio-hog;
157 gpios = <7 GPIO_ACTIVE_HIGH>;
158 output-high;
159 line-name = "usb-vbus";
160 };
161 };
162
163 &mdio0 {
164 status = "okay";
165
166 phy0: ethernet-phy@0 {
167 reg = <0>;
168 phy-mode = "sgmii";
169 qca,ar8327-initvals = <
170 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
171 0x7c 0x0000007e /* PORT0_STATUS */
172 >;
173 };
174 };
175
176 &pcie {
177 status = "okay";
178
179 wifi@0,0 {
180 compatible = "qcom,ath10k";
181 reg = <0 0 0 0 0>;
182
183 nvmem-cells = <&macaddr_art_5006>, <&calibration_ath10k>;
184 nvmem-cell-names = "mac-address", "pre-calibration";
185 };
186 };
187
188 &usb0 {
189 status = "okay";
190 };
191
192 &usb1 {
193 status = "okay";
194 };
195
196 &usb_phy0 {
197 status = "okay";
198 };
199
200 &usb_phy1 {
201 status = "okay";
202 };
203
204 &wmac {
205 status = "okay";
206
207 nvmem-cells = <&macaddr_art_1002>, <&calibration_ath9k>;
208 nvmem-cell-names = "mac-address", "calibration";
209 };