Invalidate dcache build option for bl2 entry at EL3

Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06

diff --git a/Makefile b/Makefile
index bcfbd65ed44f98bef5b79a192e3eb9d7e8375707..ecff944f749c7e6ad715185e853cf47fa6eb6913 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -689,6 +689,7 @@ $(eval $(call assert_boolean,USE_TBBR_DEFS))
 $(eval $(call assert_boolean,WARMBOOT_ENABLE_DCACHE_EARLY))
 $(eval $(call assert_boolean,BL2_AT_EL3))
 $(eval $(call assert_boolean,BL2_IN_XIP_MEM))
+$(eval $(call assert_boolean,BL2_INV_DCACHE))
 
 $(eval $(call assert_numeric,ARM_ARCH_MAJOR))
 $(eval $(call assert_numeric,ARM_ARCH_MINOR))
@@ -749,6 +750,7 @@ $(eval $(call add_define,USE_TBBR_DEFS))
 $(eval $(call add_define,WARMBOOT_ENABLE_DCACHE_EARLY))
 $(eval $(call add_define,BL2_AT_EL3))
 $(eval $(call add_define,BL2_IN_XIP_MEM))
+$(eval $(call add_define,BL2_INV_DCACHE))
 
 ifeq (${SANITIZE_UB},trap)
         $(eval $(call add_define,MONITOR_TRAPS))

diff --git a/docs/getting_started/user-guide.rst b/docs/getting_started/user-guide.rst
index 48cbdb9f444c65016afd131a27d6b5999c5d53a2..3828d0b4e7775ca4ce3ea9bc84ffa239dfb5c0ad 100644 (file)
--- a/docs/getting_started/user-guide.rst
+++ b/docs/getting_started/user-guide.rst
@@ -287,6 +287,12 @@ Common build options
    enable this use-case. For now, this option is only supported when BL2_AT_EL3
    is set to '1'.
 
+-  ``BL2_INV_DCACHE``: This is an optional build option which control dcache
+   invalidation upon BL2 entry. Some platform cannot handle cache operations
+   during entry as the coherency unit is not yet initialized. This may cause
+   crashing. Leaving this option to '1' (default) will allow the operation.
+   This option is only relevant when BL2_AT_EL3 is set to '1'.
+
 -  ``BL31``: This is an optional build option which specifies the path to
    BL31 image for the ``fip`` target. In this case, the BL31 in TF-A will not
    be built.

diff --git a/include/arch/aarch64/el3_common_macros.S b/include/arch/aarch64/el3_common_macros.S
index a36b7da79f1433c799ff69fc3f9ce988a67a5d14..53396d44b6285f425c0f1b6e4a6bbfd09e831864 100644 (file)
--- a/include/arch/aarch64/el3_common_macros.S
+++ b/include/arch/aarch64/el3_common_macros.S
@@ -333,7 +333,7 @@
         * ---------------------------------------------------------------------
         */
        .if \_init_c_runtime
-#if defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3)
+#if defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3 && BL2_INV_DCACHE)
                /* -------------------------------------------------------------
                 * Invalidate the RW memory used by the BL31 image. This
                 * includes the data and NOBITS sections. This is done to

diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index e462505a29a5a452ad294509a52fd8e547e6521d..b6f76559cb7dcd30c199b70c2a51507e48506707 100644 (file)
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -33,6 +33,9 @@ BL2_AT_EL3                    := 0
 # when BL2_AT_EL3 is 1.
 BL2_IN_XIP_MEM                 := 0
 
+# Do dcache invalidate upon BL2 entry at EL3
+BL2_INV_DCACHE                 := 1
+
 # Select the branch protection features to use.
 BRANCH_PROTECTION              := 0
 

diff --git a/plat/intel/soc/agilex/platform.mk b/plat/intel/soc/agilex/platform.mk
index 5d20462b742fc69c4faccd8e640d565fdd67f1db..d1ea62915c38e78290fefa7af6fb998102d5ae15 100644 (file)
--- a/plat/intel/soc/agilex/platform.mk
+++ b/plat/intel/soc/agilex/platform.mk
@@ -70,5 +70,6 @@ BL31_SOURCES  +=      \
 
 PROGRAMMABLE_RESET_ADDRESS     := 0
 BL2_AT_EL3                     := 1
+BL2_INV_DCACHE                 := 0
 MULTI_CONSOLE_API              := 1
 USE_COHERENT_MEM               := 1