realtek: clock driver: provide crystal/oscillator clock
authorMarkus Stockhausen <markus.stockhausen@gmx.de>
Tue, 6 Sep 2022 08:53:54 +0000 (10:53 +0200)
committerSander Vanheule <sander@svanheule.net>
Mon, 26 Dec 2022 19:29:36 +0000 (20:29 +0100)
Until now the driver depends on an external DT oscillator definition.
For now we can not see any benefit of setting that in the device tree.
Lots of other Linux kernel drivers hardcode these values. Usually the
name xtal (crystal) is used there. Align that and register a fixed
frequency clock (named xtal_clk) in the driver.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
[move cosmetic changes to separate patches]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
target/linux/realtek/files-5.10/drivers/clk/realtek/clk-rtl83xx.c

index dc6df141f03900d2cded0ab97dddde90c39ddc9a..32e5ae5c242417023e72205f9689cd03ed1e5846 100644 (file)
@@ -244,9 +244,9 @@ struct rtcl_clk {
 };
 
 static const struct rtcl_clk_info rtcl_clk_info[CLK_COUNT] = {
-       RTCL_CLK_INFO(CLK_CPU, "cpu_clk", "ref_clk", "CPU"),
-       RTCL_CLK_INFO(CLK_MEM, "mem_clk", "ref_clk", "MEM"),
-       RTCL_CLK_INFO(CLK_LXB, "lxb_clk", "ref_clk", "LXB")
+       RTCL_CLK_INFO(CLK_CPU, "cpu_clk", "xtal_clk", "CPU"),
+       RTCL_CLK_INFO(CLK_MEM, "mem_clk", "xtal_clk", "MEM"),
+       RTCL_CLK_INFO(CLK_LXB, "lxb_clk", "xtal_clk", "LXB")
 };
 
 struct rtcl_dram {
@@ -542,8 +542,12 @@ static struct clk_hw *rtcl_get_clkhw(struct of_phandle_args *clkspec, void *prv)
 
 static int rtcl_ccu_register_clocks(void)
 {
+       struct clk *clk;
        int clk_idx, ret;
 
+       clk = clk_register_fixed_rate(NULL, "xtal_clk", NULL, 0, RTCL_XTAL_RATE);
+       clk_register_clkdev(clk, "xtal_clk", NULL);
+
        for (clk_idx = 0; clk_idx < CLK_COUNT; clk_idx++) {
                ret = rtcl_register_clkhw(clk_idx);
                if (ret) {