Since memory reclocking support is incomplete, and LXB reclocking would cause
issues with UART and timer rates, disable changing the rates of these clocks.
const struct rtcl_rtab_set *rtab = &rtcl_rtab_set[rtcl_ccu->soc][clk->idx];
const struct rtcl_round_set *round = &rtcl_round_set[rtcl_ccu->soc][clk->idx];
- if ((parent_rate != RTCL_XTAL_RATE) || (!rtcl_ccu->sram.vbase))
+ if ((clk->idx != CLK_CPU) || (!rtcl_ccu->sram.vbase))
return -EINVAL;
/*
* Currently we do not know if SRAM is stable on these devices. Maybe someone