lantiq: dts: overhaul PCIe nodes
authorMathias Kresin <dev@kresin.me>
Tue, 5 Jan 2021 00:06:50 +0000 (01:06 +0100)
committerMathias Kresin <dev@kresin.me>
Mon, 12 Apr 2021 21:50:45 +0000 (23:50 +0200)
- create subnode for the child PCIe bridge
- disable PCIe by default and enable where it wasn't disabled before
- move the PCIe reset gpio to the boards dts, if we have to overwrite
  a SoC wide default, we shouldn't define a SoC wide default
- Add PCIe mem range even if they aren't yet used. Don't add the PCI I/O
  range since this range is only reserved by the driver but never used.
  Most likely as a precaution to ensure no one else writes into this
  range.

Signed-off-by: Mathias Kresin <dev@kresin.me>
22 files changed:
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_alphanetworks_asl56026.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3370-rev2.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360-v2.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7360sl.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7412.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_buffalo_wbmr-300hpd.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_netgear_dm200.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-f1.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-f3.dts
target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi

index 820cefb91669e5ba867c2bf0438060e8134b00a5..492d8ce6820552b26ad48f5ef80d5e2cb2138791 100644 (file)
                };
 
                pcie0: pcie@d900000 {
+                       status = "disabled";
+
                        compatible = "lantiq,pcie-xrx200";
 
                        #interrupt-cells = <1>;
 
                        reg = <0xd900000 0x1000>;
 
+                       ranges = <0x2000000 0 0x1c000000 0xc000000 0 0x1000000>;
+
                        interrupt-parent = <&icu0>;
                        interrupts = <161 144>;
 
 
                        device_type = "pci";
 
-                       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+                       pcie_bridge0: bridge@0 {
+                               #size-cells = <2>;
+                               #address-cells = <3>;
+                               reg = <0 0 0 0 0>;
+                               ranges;
+                       };
                };
 
                pci0: pci@e105400 {
index 84a2a9342835a86d5ca11a9397e3c7e47068a7d2..fea1e1c5b4255651984b8fe23808f11cbd814937 100644 (file)
                };
        };
 };
+
+&pcie0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
index e7c55321459f9ea449c67393b5aa36e583bd4360..bf56dc8fbc9507158c3eafb52fba5f73d3e727f5 100644 (file)
                };
        };
 };
+
+&pcie0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
index 9d2e9e6e0cea6ce78d563278ed8f218b714ab8fc..b5099cd8abc61c7890bbe68e0dfd09cf1f2a5492 100644 (file)
        };
 };
 
-&pcie0 {
-       status = "disabled";
-};
-
 &usb_phy0 {
        status = "okay";
 };
index 5df6805e96676c166a9174aaded0a2819905a62a..e296725eebef19860cb3ebcd7f23c6a14972db75 100644 (file)
        };
 };
 
-&pcie0 {
-       status = "disabled";
-};
-
 &stp {
        status = "okay";
        lantiq,shadow = <0xffff>;
index 09c95375d502e79f24cf7ab27690a9b9a94baecb..8cddd446da6fe4e2410e5e6130da73565d202dd5 100644 (file)
 };
 
 &pcie0 {
+       status = "okay";
        gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+};
 
-       pcie@0 {
+&pcie_bridge0 {
+       wifi@0,0 {
+               compatible = "pci0,0";
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <2>;
-               #address-cells = <3>;
-               device_type = "pci";
-
-               wifi@0,0 {
-                       compatible = "pci0,0";
-                       reg = <0 0 0 0 0>;
-                       qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
-               };
+               qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
        };
 };
 
index 09c97a64541fd898018eb41d9a1a2317a695df53..9511e36413b710d0ee91d1b44972f25f87026aec 100644 (file)
 &pcie0 {
        status = "okay";
        gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
+};
 
-       pcie@0 {
+&pcie_bridge0 {
+       wifi@0,0 {
+               compatible = "pci168c,0033";
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <1>;
-               #address-cells = <2>;
-               device_type = "pci";
-
-               wifi@0,0 {
-                       compatible = "pci168c,0033";
-                       reg = <0 0 0 0 0>;
-                       qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
-               };
+               qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
        };
 };
index 3bd6ff0ee73bf5005eca1f90240020bfcb5d5a2c..7d592201e7b6af17bef322e89a9d64d049e05dc2 100644 (file)
@@ -7,14 +7,6 @@
        model = "AVM FRITZ!Box 7360 V2";
 };
 
-&state_default {
-       pcie-rst {
-               lantiq,pins = "io21";
-               lantiq,pull = <0>;
-               lantiq,output = <1>;
-       };
-};
-
 &localbus {
        flash@0 {
                compatible = "lantiq,nor";
index 898ca00c34ac36898727c8e91893ed32aba94219..72ab2e6c6f80dd458daa49c15a44e42f7d068756 100644 (file)
@@ -7,14 +7,6 @@
        model = "AVM FRITZ!Box 7360 SL";
 };
 
-&state_default {
-       pcie-rst {
-               lantiq,pins = "io38";
-               lantiq,pull = <0>;
-               lantiq,output = <1>;
-       };
-};
-
 &localbus {
        flash@0 {
                compatible = "lantiq,nor";
index c26908642cfe4ad2ac96548382c916a11944992f..0de1520ce04d91f434beab21b4867dfd4e05c0f3 100644 (file)
@@ -7,14 +7,6 @@
        model = "AVM FRITZ!Box 7362 SL";
 };
 
-&state_default {
-       pcie-rst {
-               lantiq,pins = "io21";
-               lantiq,open-drain = <1>;
-               lantiq,output = <1>;
-       };
-};
-
 &spi {
        status = "okay";
 
                };
        };
 };
-
-&pcie0 {
-       gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
-
-       pcie@0 {
-               #size-cells = <1>;
-               #address-cells = <2>;
-       };
-};
index c7e600aace204767d730d4ed17facab049228bd3..b8055bb2bb46f9ac40fcaf31bcdc10b3d3cb56ca 100644 (file)
                        lantiq,open-drain;
                        lantiq,output = <1>;
                };
+
+               pcie-rst {
+                       lantiq,pins = "io21";
+                       lantiq,open-drain = <1>;
+                       lantiq,output = <1>;
+               };
        };
 
 };
 
 &pcie0 {
        status = "okay";
+       gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
+};
 
-       pcie@0 {
+&pcie_bridge0 {
+       wifi@168c,002e {
+               compatible = "pci168c,002e";
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <1>;
-               #address-cells = <2>;
-               device_type = "pci";
-
-               wifi@168c,002e {
-                       compatible = "pci168c,002e";
-                       reg = <0 0 0 0 0>;
-                       qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
-               };
+               qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
        };
 };
 
index 3b1703dd3c8655131ca3539886b861db89b0c993..c15db8870378a95f25a6a7d7e966b6396e78b147 100644 (file)
 &pcie0 {
        status = "okay";
        gpio-reset = <&gpio 11 GPIO_ACTIVE_HIGH>;
+};
 
-       pcie@0 {
+&pcie_bridge0 {
+       wifi@168c,002e {
+               compatible = "pci168c,002e";
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <2>;
-               #address-cells = <3>;
-               device_type = "pci";
-
-               wifi@168c,002e {
-                       compatible = "pci168c,002e";
-                       reg = <0 0 0 0 0>;
-                       qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
-               };
+               qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
        };
 };
 
index 3894fecb434b7ebd9aa86ba6c7feeedbf79eeed1..cf52b6b12c2be697afab1915eeab17990f06a050 100644 (file)
 
 &pcie0 {
        status = "okay";
-
        gpio-reset = <&gpio 11 GPIO_ACTIVE_LOW>;
+};
 
-       pcie@0 {
+&pcie_bridge0 {
+       wifi@168c,abcd {
+               compatible = "pci168c,abcd";
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <2>;
-               #address-cells = <3>;
-               device_type = "pci";
-
-               wifi@168c,abcd {
-                       compatible = "pci168c,abcd";
-                       reg = <0 0 0 0 0>;
-                       qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
-               };
+               qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
        };
 };
 
index e1bda19fd37469e99b00784cb2847ccd48180848..931de01d07805b6a41d037b0e8073cc32e6e7787 100644 (file)
        };
 };
 
+&pcie0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
+
 &usb_phy0 {
        status = "okay";
 };
index 8917d359e7b990239dbc9faf752f220c9d2fdc1b..edb02267e8dc215d7b228bcd12ce8dcf7c3b5d75 100644 (file)
        status = "okay";
        vbus-supply = <&usb_vbus>;
 };
+
+&pcie0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
index 9cac3e6ec059e56afcfd05f7bd7818d69efad9e1..da8a00d719115baf45911525bbce53df47f694d4 100644 (file)
        status = "okay";
        vbus-supply = <&usb_vbus>;
 };
+
+&pcie0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
index be4810c43141108bd09fc02649db85c1ace1dab7..43fbf37666538c6dd5c131908d8e2264d0d6820a 100644 (file)
        lantiq,gphy-mode = <GPHY_MODE_FE>;
 };
 
-&pcie0 {
-       status = "disabled";
-};
-
 &spi {
        status = "okay";
 
index d33b817f2d70bc1f6f206fb623b7060d409fb89e..a4a9816383599989fa68fcc168fd844692adf119 100644 (file)
 };
 
 &pcie0 {
-       pcie@0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
+
+&pcie_bridge0 {
+       ath9k: wifi@168c,002e {
+               compatible = "pci168c,002e";
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <2>;
-               #address-cells = <3>;
-               device_type = "pci";
-
-               ath9k: wifi@168c,002e {
-                       compatible = "pci168c,002e";
-                       reg = <0 0 0 0 0>;
-                       #gpio-cells = <2>;
-                       gpio-controller;
-                       qca,no-eeprom;
-                       qca,disable-5ghz;
-                       mtd-mac-address = <&ath9k_cal 0xf100>;
-                       mtd-mac-address-increment = <2>;
-               };
+               #gpio-cells = <2>;
+               gpio-controller;
+               qca,no-eeprom;
+               qca,disable-5ghz;
+               mtd-mac-address = <&ath9k_cal 0xf100>;
+               mtd-mac-address-increment = <2>;
        };
 };
 
index ab7eaae2481d028e6c8c5385b61fd406bf90f26f..a8d37280a5bf8c59f69d6c68487fb0a7b19249fe 100644 (file)
 };
 
 &pcie0 {
-       pcie@0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
+
+&pcie_bridge0 {
+       wifi@0,0 {
                reg = <0 0 0 0 0>;
-               #interrupt-cells = <1>;
-               #size-cells = <2>;
-               #address-cells = <3>;
-               device_type = "pci";
-
-               wifi@0,0 {
-                       reg = <0 0 0 0 0>;
-                       mediatek,mtd-eeprom = <&radio 0x0000>;
-                       big-endian;
-                       ieee80211-freq-limit = <5000000 6000000>;
-                       mtd-mac-address = <&romfile 0xf100>;
-                       mtd-mac-address-increment = <2>;
-               };
+               mediatek,mtd-eeprom = <&radio 0x0000>;
+               big-endian;
+               ieee80211-freq-limit = <5000000 6000000>;
+               mtd-mac-address = <&romfile 0xf100>;
+               mtd-mac-address-increment = <2>;
        };
 };
 
index 0e029d1995665d565e498025776ca6f83c18aa76..37149240fb540fb752454116d7300458433a695a 100644 (file)
@@ -62,7 +62,3 @@
                ralink,eeprom = "RT3062.eeprom";
        };
 };
-
-&pcie0 {
-       status = "disabled";
-};
index 12280241a59379f5f9668bee752c5442e44745f2..3487d3606180ad43d07e69e6bb1be2b9ede9dbea 100644 (file)
@@ -5,6 +5,14 @@
        model = "ZyXEL P-2812HNU-F3";
 };
 
+&state_default {
+       pcie-rst {
+               lantiq,pins = "io38";
+               lantiq,pull = <0>;
+               lantiq,output = <1>;
+       };
+};
+
 &pci0 {
        wifi@1814,3092 {
                compatible = "pci1814,3092";
@@ -61,3 +69,8 @@
                };
        };
 };
+
+&pcie0 {
+       status = "okay";
+       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
+};
index fc49899a7d00882f2156b3e9324c0a7799e05ac4..48955b33fbaf330232b66920dac0e117421f2e0c 100644 (file)
                        lantiq,open-drain = <0>;
                        lantiq,pull = <2>;
                };
-               pcie-rst {
-                       lantiq,pins = "io38";
-                       lantiq,pull = <0>;
-                       lantiq,output = <1>;
-               };
                ifxhcd-rst {
                        lantiq,pins = "io33";
                        lantiq,pull = <0>;