kernel: import accepted MediaTek Ethernet patches

[openwrt/staging/aparcar.git] / target / linux / generic / pending-5.15 / 728-net-mtk_sgmii-set-the-speed-according-to-the-phy-int.patch

diff --git a/target/linux/generic/pending-5.15/728-net-mtk_sgmii-set-the-speed-according-to-the-phy-int.patch b/target/linux/generic/pending-5.15/728-net-mtk_sgmii-set-the-speed-according-to-the-phy-int.patch
index 0b17f77eef451172f4138203416c09214c24cfc2..f58499c7c202c4d2100a18d86b1c98a554b42b1a 100644 (file)
--- a/target/linux/generic/pending-5.15/728-net-mtk_sgmii-set-the-speed-according-to-the-phy-int.patch
+++ b/target/linux/generic/pending-5.15/728-net-mtk_sgmii-set-the-speed-according-to-the-phy-int.patch
@@ -14,7 +14,7 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
 
 --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
 +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
-@@ -21,13 +21,20 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
+@@ -20,12 +20,14 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
  }
  
  /* For SGMII interface mode */
@@ -23,25 +23,19 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
  {
        unsigned int val;
  
-       /* PHYA power down */
-       regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD);
- 
-+      /* Set SGMII phy speed */
-+      regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
-+      val &= ~RG_PHY_SPEED_MASK;
+       regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
+       val &= ~RG_PHY_SPEED_MASK;
 +      if (interface == PHY_INTERFACE_MODE_2500BASEX)
 +              val |= RG_PHY_SPEED_3_125G;
-+      regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
-+
+       regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
+ 
        /* Setup the link timer and QPHY power up inside SGMIISYS */
-       regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER,
-                    SGMII_LINK_TIMER_DEFAULT);
-@@ -100,7 +107,7 @@ static int mtk_pcs_config(struct phylink
+@@ -98,7 +100,7 @@ static int mtk_pcs_config(struct phylink
        if (interface != PHY_INTERFACE_MODE_SGMII)
                err = mtk_pcs_setup_mode_force(mpcs, interface);
        else if (phylink_autoneg_inband(mode))
 -              err = mtk_pcs_setup_mode_an(mpcs);
 +              err = mtk_pcs_setup_mode_an(mpcs, interface);
  
-       return err;
- }
+       /* Release PHYA power down state
+        * Only removing bit SGMII_PHYA_PWD isn't enough.