rockchip: add NanoPi R5S support
[openwrt/staging/hauke.git] / target / linux / rockchip / patches-6.1 / 009-v6.4-arm64-dts-rockchip-Add-FriendlyElec-Nanopi-R5S.patch
1 From c6629b9a6738a64507478527da6c7b83c10a6d2c Mon Sep 17 00:00:00 2001
2 From: Vasily Khoruzhick <anarsoul@gmail.com>
3 Date: Tue, 7 Mar 2023 22:32:40 -0800
4 Subject: [PATCH] arm64: dts: rockchip: Add FriendlyElec Nanopi R5S
5
6 FriendlyElec Nanopi R5S is an open-sourced mini IoT gateway device.
7
8 Board Specifications
9 - Rockchip RK3568
10 - 2 or 4GB LPDDR4X
11 - 8GB or 16GB eMMC, SD card slot
12 - GbE LAN (Native)
13 - 2x 2.5G LAN (PCIe)
14 - M.2 Connector
15 - HDMI 2.0, MIPI DSI/CSI
16 - 2xUSB 3.0 Host
17 - USB Type C PD, 5V/9V/12V
18 - GPIO: 12-pin 0.5mm FPC connector
19
20 Based on Tianling Shen's <cnsztl@gmail.com> work.
21
22 Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
23 Link: https://lore.kernel.org/r/20230308063240.107178-2-anarsoul@gmail.com
24 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
25 ---
26 arch/arm64/boot/dts/rockchip/Makefile | 1 +
27 .../boot/dts/rockchip/rk3568-nanopi-r5s.dts | 713 ++++++++++++++++++
28 2 files changed, 714 insertions(+)
29 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
30
31 --- a/arch/arm64/boot/dts/rockchip/Makefile
32 +++ b/arch/arm64/boot/dts/rockchip/Makefile
33 @@ -74,4 +74,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro
34 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
35 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
36 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
37 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
38 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
39 --- /dev/null
40 +++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
41 @@ -0,0 +1,713 @@
42 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
43 +/*
44 + * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
45 + * (http://www.friendlyelec.com)
46 + *
47 + * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
48 + */
49 +
50 +/dts-v1/;
51 +#include <dt-bindings/gpio/gpio.h>
52 +#include <dt-bindings/input/input.h>
53 +#include <dt-bindings/leds/common.h>
54 +#include <dt-bindings/pinctrl/rockchip.h>
55 +#include <dt-bindings/soc/rockchip,vop2.h>
56 +#include "rk3568.dtsi"
57 +
58 +/ {
59 + model = "FriendlyElec NanoPi R5S";
60 + compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
61 +
62 + aliases {
63 + ethernet0 = &gmac0;
64 + mmc0 = &sdmmc0;
65 + mmc1 = &sdhci;
66 + };
67 +
68 + chosen: chosen {
69 + stdout-path = "serial2:1500000n8";
70 + };
71 +
72 + hdmi-con {
73 + compatible = "hdmi-connector";
74 + type = "a";
75 +
76 + port {
77 + hdmi_con_in: endpoint {
78 + remote-endpoint = <&hdmi_out_con>;
79 + };
80 + };
81 + };
82 +
83 + gpio-leds {
84 + compatible = "gpio-leds";
85 + pinctrl-names = "default";
86 + pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>;
87 +
88 + led-lan1 {
89 + color = <LED_COLOR_ID_GREEN>;
90 + function = LED_FUNCTION_LAN;
91 + function-enumerator = <1>;
92 + gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
93 + };
94 +
95 + led-lan2 {
96 + color = <LED_COLOR_ID_GREEN>;
97 + function = LED_FUNCTION_LAN;
98 + function-enumerator = <2>;
99 + gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
100 + };
101 +
102 + power_led: led-power {
103 + color = <LED_COLOR_ID_RED>;
104 + function = LED_FUNCTION_POWER;
105 + linux,default-trigger = "heartbeat";
106 + gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
107 + };
108 +
109 + led-wan {
110 + color = <LED_COLOR_ID_GREEN>;
111 + function = LED_FUNCTION_WAN;
112 + gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
113 + };
114 + };
115 +
116 + vdd_usbc: vdd-usbc-regulator {
117 + compatible = "regulator-fixed";
118 + regulator-name = "vdd_usbc";
119 + regulator-always-on;
120 + regulator-boot-on;
121 + regulator-min-microvolt = <5000000>;
122 + regulator-max-microvolt = <5000000>;
123 + };
124 +
125 + vcc3v3_sys: vcc3v3-sys-regulator {
126 + compatible = "regulator-fixed";
127 + regulator-name = "vcc3v3_sys";
128 + regulator-always-on;
129 + regulator-boot-on;
130 + regulator-min-microvolt = <3300000>;
131 + regulator-max-microvolt = <3300000>;
132 + vin-supply = <&vdd_usbc>;
133 + };
134 +
135 + vcc5v0_sys: vcc5v0-sys-regulator {
136 + compatible = "regulator-fixed";
137 + regulator-name = "vcc5v0_sys";
138 + regulator-always-on;
139 + regulator-boot-on;
140 + regulator-min-microvolt = <5000000>;
141 + regulator-max-microvolt = <5000000>;
142 + vin-supply = <&vdd_usbc>;
143 + };
144 +
145 + vcc3v3_pcie: vcc3v3-pcie-regulator {
146 + compatible = "regulator-fixed";
147 + regulator-name = "vcc3v3_pcie";
148 + regulator-min-microvolt = <3300000>;
149 + regulator-max-microvolt = <3300000>;
150 + enable-active-high;
151 + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
152 + startup-delay-us = <200000>;
153 + vin-supply = <&vcc5v0_sys>;
154 + };
155 +
156 + vcc5v0_usb: vcc5v0-usb-regulator {
157 + compatible = "regulator-fixed";
158 + regulator-name = "vcc5v0_usb";
159 + regulator-always-on;
160 + regulator-boot-on;
161 + regulator-min-microvolt = <5000000>;
162 + regulator-max-microvolt = <5000000>;
163 + vin-supply = <&vdd_usbc>;
164 + };
165 +
166 + vcc5v0_usb_host: vcc5v0-usb-host-regulator {
167 + compatible = "regulator-fixed";
168 + enable-active-high;
169 + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
170 + pinctrl-names = "default";
171 + pinctrl-0 = <&vcc5v0_usb_host_en>;
172 + regulator-name = "vcc5v0_usb_host";
173 + regulator-always-on;
174 + regulator-boot-on;
175 + regulator-min-microvolt = <5000000>;
176 + regulator-max-microvolt = <5000000>;
177 + vin-supply = <&vcc5v0_usb>;
178 + };
179 +
180 + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
181 + compatible = "regulator-fixed";
182 + enable-active-high;
183 + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
184 + pinctrl-names = "default";
185 + pinctrl-0 = <&vcc5v0_usb_otg_en>;
186 + regulator-name = "vcc5v0_usb_otg";
187 + regulator-min-microvolt = <5000000>;
188 + regulator-max-microvolt = <5000000>;
189 + vin-supply = <&vcc5v0_usb>;
190 + };
191 +
192 + pcie30_avdd0v9: pcie30-avdd0v9-regulator {
193 + compatible = "regulator-fixed";
194 + regulator-name = "pcie30_avdd0v9";
195 + regulator-always-on;
196 + regulator-boot-on;
197 + regulator-min-microvolt = <900000>;
198 + regulator-max-microvolt = <900000>;
199 + vin-supply = <&vcc3v3_sys>;
200 + };
201 +
202 + pcie30_avdd1v8: pcie30-avdd1v8-regulator {
203 + compatible = "regulator-fixed";
204 + regulator-name = "pcie30_avdd1v8";
205 + regulator-always-on;
206 + regulator-boot-on;
207 + regulator-min-microvolt = <1800000>;
208 + regulator-max-microvolt = <1800000>;
209 + vin-supply = <&vcc3v3_sys>;
210 + };
211 +};
212 +
213 +&combphy0 {
214 + status = "okay";
215 +};
216 +
217 +&combphy1 {
218 + status = "okay";
219 +};
220 +
221 +&combphy2 {
222 + status = "okay";
223 +};
224 +
225 +&cpu0 {
226 + cpu-supply = <&vdd_cpu>;
227 +};
228 +
229 +&cpu1 {
230 + cpu-supply = <&vdd_cpu>;
231 +};
232 +
233 +&cpu2 {
234 + cpu-supply = <&vdd_cpu>;
235 +};
236 +
237 +&cpu3 {
238 + cpu-supply = <&vdd_cpu>;
239 +};
240 +
241 +&gmac0 {
242 + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
243 + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
244 + assigned-clock-rates = <0>, <125000000>;
245 + clock_in_out = "output";
246 + phy-handle = <&rgmii_phy0>;
247 + phy-mode = "rgmii-id";
248 + pinctrl-names = "default";
249 + pinctrl-0 = <&gmac0_miim
250 + &gmac0_tx_bus2
251 + &gmac0_rx_bus2
252 + &gmac0_rgmii_clk
253 + &gmac0_rgmii_bus>;
254 + snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
255 + snps,reset-active-low;
256 + /* Reset time is 15ms, 50ms for rtl8211f */
257 + snps,reset-delays-us = <0 15000 50000>;
258 + tx_delay = <0x3c>;
259 + rx_delay = <0x2f>;
260 + status = "okay";
261 +};
262 +
263 +&gpu {
264 + mali-supply = <&vdd_gpu>;
265 + status = "okay";
266 +};
267 +
268 +&hdmi {
269 + avdd-0v9-supply = <&vdda0v9_image>;
270 + avdd-1v8-supply = <&vcca1v8_image>;
271 + status = "okay";
272 +};
273 +
274 +&hdmi_in {
275 + hdmi_in_vp0: endpoint {
276 + remote-endpoint = <&vp0_out_hdmi>;
277 + };
278 +};
279 +
280 +&hdmi_out {
281 + hdmi_out_con: endpoint {
282 + remote-endpoint = <&hdmi_con_in>;
283 + };
284 +};
285 +
286 +&hdmi_sound {
287 + status = "okay";
288 +};
289 +
290 +&i2c0 {
291 + status = "okay";
292 +
293 + vdd_cpu: regulator@1c {
294 + compatible = "tcs,tcs4525";
295 + reg = <0x1c>;
296 + fcs,suspend-voltage-selector = <1>;
297 + regulator-name = "vdd_cpu";
298 + regulator-always-on;
299 + regulator-boot-on;
300 + regulator-min-microvolt = <800000>;
301 + regulator-max-microvolt = <1150000>;
302 + regulator-ramp-delay = <2300>;
303 + vin-supply = <&vcc5v0_sys>;
304 +
305 + regulator-state-mem {
306 + regulator-off-in-suspend;
307 + };
308 + };
309 +
310 + rk809: pmic@20 {
311 + compatible = "rockchip,rk809";
312 + reg = <0x20>;
313 + interrupt-parent = <&gpio0>;
314 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
315 + #clock-cells = <1>;
316 + pinctrl-names = "default";
317 + pinctrl-0 = <&pmic_int>;
318 + rockchip,system-power-controller;
319 + vcc1-supply = <&vcc3v3_sys>;
320 + vcc2-supply = <&vcc3v3_sys>;
321 + vcc3-supply = <&vcc3v3_sys>;
322 + vcc4-supply = <&vcc3v3_sys>;
323 + vcc5-supply = <&vcc3v3_sys>;
324 + vcc6-supply = <&vcc3v3_sys>;
325 + vcc7-supply = <&vcc3v3_sys>;
326 + vcc8-supply = <&vcc3v3_sys>;
327 + vcc9-supply = <&vcc3v3_sys>;
328 + wakeup-source;
329 +
330 + regulators {
331 + vdd_logic: DCDC_REG1 {
332 + regulator-name = "vdd_logic";
333 + regulator-always-on;
334 + regulator-boot-on;
335 + regulator-init-microvolt = <900000>;
336 + regulator-initial-mode = <0x2>;
337 + regulator-min-microvolt = <500000>;
338 + regulator-max-microvolt = <1350000>;
339 + regulator-ramp-delay = <6001>;
340 +
341 + regulator-state-mem {
342 + regulator-off-in-suspend;
343 + };
344 + };
345 +
346 + vdd_gpu: DCDC_REG2 {
347 + regulator-name = "vdd_gpu";
348 + regulator-always-on;
349 + regulator-init-microvolt = <900000>;
350 + regulator-initial-mode = <0x2>;
351 + regulator-min-microvolt = <500000>;
352 + regulator-max-microvolt = <1350000>;
353 + regulator-ramp-delay = <6001>;
354 +
355 + regulator-state-mem {
356 + regulator-off-in-suspend;
357 + };
358 + };
359 +
360 + vcc_ddr: DCDC_REG3 {
361 + regulator-name = "vcc_ddr";
362 + regulator-always-on;
363 + regulator-boot-on;
364 + regulator-initial-mode = <0x2>;
365 +
366 + regulator-state-mem {
367 + regulator-on-in-suspend;
368 + };
369 + };
370 +
371 + vdd_npu: DCDC_REG4 {
372 + regulator-name = "vdd_npu";
373 + regulator-init-microvolt = <900000>;
374 + regulator-initial-mode = <0x2>;
375 + regulator-min-microvolt = <500000>;
376 + regulator-max-microvolt = <1350000>;
377 + regulator-ramp-delay = <6001>;
378 +
379 + regulator-state-mem {
380 + regulator-off-in-suspend;
381 + };
382 + };
383 +
384 + vcc_1v8: DCDC_REG5 {
385 + regulator-name = "vcc_1v8";
386 + regulator-always-on;
387 + regulator-boot-on;
388 + regulator-min-microvolt = <1800000>;
389 + regulator-max-microvolt = <1800000>;
390 +
391 + regulator-state-mem {
392 + regulator-off-in-suspend;
393 + };
394 + };
395 +
396 + vdda0v9_image: LDO_REG1 {
397 + regulator-name = "vdda0v9_image";
398 + regulator-min-microvolt = <950000>;
399 + regulator-max-microvolt = <950000>;
400 +
401 + regulator-state-mem {
402 + regulator-off-in-suspend;
403 + };
404 + };
405 +
406 + vdda_0v9: LDO_REG2 {
407 + regulator-name = "vdda_0v9";
408 + regulator-always-on;
409 + regulator-boot-on;
410 + regulator-min-microvolt = <900000>;
411 + regulator-max-microvolt = <900000>;
412 +
413 + regulator-state-mem {
414 + regulator-off-in-suspend;
415 + };
416 + };
417 +
418 + vdda0v9_pmu: LDO_REG3 {
419 + regulator-name = "vdda0v9_pmu";
420 + regulator-always-on;
421 + regulator-boot-on;
422 + regulator-min-microvolt = <900000>;
423 + regulator-max-microvolt = <900000>;
424 +
425 + regulator-state-mem {
426 + regulator-on-in-suspend;
427 + regulator-suspend-microvolt = <900000>;
428 + };
429 + };
430 +
431 + vccio_acodec: LDO_REG4 {
432 + regulator-name = "vccio_acodec";
433 + regulator-always-on;
434 + regulator-min-microvolt = <3300000>;
435 + regulator-max-microvolt = <3300000>;
436 +
437 + regulator-state-mem {
438 + regulator-off-in-suspend;
439 + };
440 + };
441 +
442 + vccio_sd: LDO_REG5 {
443 + regulator-name = "vccio_sd";
444 + regulator-min-microvolt = <1800000>;
445 + regulator-max-microvolt = <3300000>;
446 +
447 + regulator-state-mem {
448 + regulator-off-in-suspend;
449 + };
450 + };
451 +
452 + vcc3v3_pmu: LDO_REG6 {
453 + regulator-name = "vcc3v3_pmu";
454 + regulator-always-on;
455 + regulator-boot-on;
456 + regulator-min-microvolt = <3300000>;
457 + regulator-max-microvolt = <3300000>;
458 +
459 + regulator-state-mem {
460 + regulator-on-in-suspend;
461 + regulator-suspend-microvolt = <3300000>;
462 + };
463 + };
464 +
465 + vcca_1v8: LDO_REG7 {
466 + regulator-name = "vcca_1v8";
467 + regulator-always-on;
468 + regulator-boot-on;
469 + regulator-min-microvolt = <1800000>;
470 + regulator-max-microvolt = <1800000>;
471 +
472 + regulator-state-mem {
473 + regulator-off-in-suspend;
474 + };
475 + };
476 +
477 + vcca1v8_pmu: LDO_REG8 {
478 + regulator-name = "vcca1v8_pmu";
479 + regulator-always-on;
480 + regulator-boot-on;
481 + regulator-min-microvolt = <1800000>;
482 + regulator-max-microvolt = <1800000>;
483 +
484 + regulator-state-mem {
485 + regulator-on-in-suspend;
486 + regulator-suspend-microvolt = <1800000>;
487 + };
488 + };
489 +
490 + vcca1v8_image: LDO_REG9 {
491 + regulator-name = "vcca1v8_image";
492 + regulator-min-microvolt = <1800000>;
493 + regulator-max-microvolt = <1800000>;
494 +
495 + regulator-state-mem {
496 + regulator-off-in-suspend;
497 + };
498 + };
499 +
500 + vcc_3v3: SWITCH_REG1 {
501 + regulator-name = "vcc_3v3";
502 + regulator-always-on;
503 + regulator-boot-on;
504 +
505 + regulator-state-mem {
506 + regulator-off-in-suspend;
507 + };
508 + };
509 +
510 + vcc3v3_sd: SWITCH_REG2 {
511 + regulator-name = "vcc3v3_sd";
512 + regulator-always-on;
513 + regulator-boot-on;
514 +
515 + regulator-state-mem {
516 + regulator-off-in-suspend;
517 + };
518 + };
519 + };
520 +
521 + };
522 +};
523 +
524 +&i2c5 {
525 + status = "okay";
526 +
527 + hym8563: rtc@51 {
528 + compatible = "haoyu,hym8563";
529 + reg = <0x51>;
530 + interrupt-parent = <&gpio0>;
531 + interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
532 + #clock-cells = <0>;
533 + clock-output-names = "rtcic_32kout";
534 + pinctrl-names = "default";
535 + pinctrl-0 = <&hym8563_int>;
536 + wakeup-source;
537 + };
538 +};
539 +
540 +&i2s0_8ch {
541 + status = "okay";
542 +};
543 +
544 +&i2s1_8ch {
545 + rockchip,trcm-sync-tx-only;
546 + status = "okay";
547 +};
548 +
549 +&mdio0 {
550 + rgmii_phy0: ethernet-phy@1 {
551 + compatible = "ethernet-phy-ieee802.3-c22";
552 + reg = <1>;
553 + pinctrl-0 = <&eth_phy0_reset_pin>;
554 + pinctrl-names = "default";
555 + reset-assert-us = <10000>;
556 + reset-deassert-us = <50000>;
557 + reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
558 + };
559 +};
560 +
561 +&pcie2x1 {
562 + num-lanes = <1>;
563 + reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
564 + status = "okay";
565 +};
566 +
567 +&pcie30phy {
568 + data-lanes = <1 2>;
569 + status = "okay";
570 +};
571 +
572 +&pcie3x1 {
573 + num-lanes = <1>;
574 + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
575 + vpcie3v3-supply = <&vcc3v3_pcie>;
576 + status = "okay";
577 +};
578 +
579 +&pcie3x2 {
580 + num-lanes = <1>;
581 + num-ib-windows = <8>;
582 + num-ob-windows = <8>;
583 + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
584 + vpcie3v3-supply = <&vcc3v3_pcie>;
585 + status = "okay";
586 +};
587 +
588 +&pinctrl {
589 + gmac0 {
590 + eth_phy0_reset_pin: eth-phy0-reset-pin {
591 + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
592 + };
593 + };
594 +
595 + gpio-leds {
596 + lan1_led_pin: lan1-led-pin {
597 + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
598 + };
599 +
600 + lan2_led_pin: lan2-led-pin {
601 + rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
602 + };
603 +
604 + power_led_pin: power-led-pin {
605 + rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
606 + };
607 +
608 + wan_led_pin: wan-led-pin {
609 + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
610 + };
611 + };
612 +
613 + hym8563 {
614 + hym8563_int: hym8563-int {
615 + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
616 + };
617 + };
618 +
619 + pmic {
620 + pmic_int: pmic-int {
621 + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
622 + };
623 + };
624 +
625 + usb {
626 + vcc5v0_usb_host_en: vcc5v0-usb-host-en {
627 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
628 + };
629 +
630 + vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
631 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
632 + };
633 + };
634 +};
635 +
636 +&pmu_io_domains {
637 + pmuio1-supply = <&vcc3v3_pmu>;
638 + pmuio2-supply = <&vcc3v3_pmu>;
639 + vccio1-supply = <&vccio_acodec>;
640 + vccio3-supply = <&vccio_sd>;
641 + vccio4-supply = <&vcc_1v8>;
642 + vccio5-supply = <&vcc_3v3>;
643 + vccio6-supply = <&vcc_1v8>;
644 + vccio7-supply = <&vcc_3v3>;
645 + status = "okay";
646 +};
647 +
648 +&saradc {
649 + vref-supply = <&vcca_1v8>;
650 + status = "okay";
651 +};
652 +
653 +&sdhci {
654 + bus-width = <8>;
655 + max-frequency = <200000000>;
656 + non-removable;
657 + pinctrl-names = "default";
658 + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
659 + status = "okay";
660 +};
661 +
662 +&sdmmc0 {
663 + max-frequency = <150000000>;
664 + no-sdio;
665 + no-mmc;
666 + bus-width = <4>;
667 + cap-mmc-highspeed;
668 + cap-sd-highspeed;
669 + disable-wp;
670 + vmmc-supply = <&vcc3v3_sd>;
671 + vqmmc-supply = <&vccio_sd>;
672 + pinctrl-names = "default";
673 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
674 + status = "okay";
675 +};
676 +
677 +&tsadc {
678 + rockchip,hw-tshut-mode = <1>;
679 + rockchip,hw-tshut-polarity = <0>;
680 + status = "okay";
681 +};
682 +
683 +&uart2 {
684 + status = "okay";
685 +};
686 +
687 +&usb_host0_ehci {
688 + status = "okay";
689 +};
690 +
691 +&usb_host0_ohci {
692 + status = "okay";
693 +};
694 +
695 +&usb_host0_xhci {
696 + extcon = <&usb2phy0>;
697 + dr_mode = "host";
698 + status = "okay";
699 +};
700 +
701 +&usb_host1_ehci {
702 + status = "okay";
703 +};
704 +
705 +&usb_host1_ohci {
706 + status = "okay";
707 +};
708 +
709 +&usb_host1_xhci {
710 + status = "okay";
711 +};
712 +
713 +&usb2phy0 {
714 + status = "okay";
715 +};
716 +
717 +&usb2phy0_host {
718 + phy-supply = <&vcc5v0_usb_host>;
719 + status = "okay";
720 +};
721 +
722 +&usb2phy0_otg {
723 + status = "okay";
724 +};
725 +
726 +&usb2phy1 {
727 + status = "okay";
728 +};
729 +
730 +&usb2phy1_host {
731 + phy-supply = <&vcc5v0_usb_otg>;
732 + status = "okay";
733 +};
734 +
735 +&usb2phy1_otg {
736 + status = "okay";
737 +};
738 +
739 +&vop {
740 + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
741 + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
742 + status = "okay";
743 +};
744 +
745 +&vop_mmu {
746 + status = "okay";
747 +};
748 +
749 +&vp0 {
750 + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
751 + reg = <ROCKCHIP_VOP2_EP_HDMI0>;
752 + remote-endpoint = <&hdmi_in_vp0>;
753 + };
754 +};