target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "sitecom,wlr-4100-v1-002", "ralink,mt7620a-soc";
  10         model = "Sitecom WLR-4100 v1 002";
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,115200";
  14         };
  15
  16         aliases {
  17                 led-boot = &led_power;
  18                 led-failsafe = &led_power;
  19                 led-running = &led_power;
  20                 led-upgrade = &led_power;
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25
  26                 led_power: power {
  27                         label = "amber:power";
  28                         gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  29                         default-state = "on";
  30                 };
  31
  32                 wifi {
  33                         label = "blue:wifi";
  34                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  35                         linux,default-trigger = "phy1tpt";
  36                 };
  37
  38                 wps {
  39                         label = "white:wps";
  40                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  41                 };
  42         };
  43
  44         keys {
  45                 compatible = "gpio-keys";
  46
  47                 wps {
  48                         label = "wps";
  49                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  50                         linux,code = <KEY_WPS_BUTTON>;
  51                 };
  52
  53                 reset {
  54                         label = "reset";
  55                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  56                         linux,code = <KEY_RESTART>;
  57                 };
  58         };
  59
  60         gpio_export {
  61                 compatible = "gpio-export";
  62                 #size-cells = <0>;
  63
  64                 usb-power {
  65                         gpio-export,name = "usb-power";
  66                         gpio-export,output = <1>;
  67                         gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  68                 };
  69         };
  70 };
  71
  72 &gpio1 {
  73         status = "okay";
  74 };
  75
  76 &gpio3 {
  77         status = "okay";
  78 };
  79
  80 &spi0 {
  81         status = "okay";
  82
  83         flash@0 {
  84                 compatible = "jedec,spi-nor";
  85                 reg = <0>;
  86                 spi-max-frequency = <20000000>;
  87
  88                 partitions {
  89                         compatible = "fixed-partitions";
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92
  93                         partition@0 {
  94                                 label = "uboot";
  95                                 reg = <0x0 0x30000>;
  96                                 read-only;
  97                         };
  98
  99                         partition@30000 {
 100                                 label = "u-boot-env";
 101                                 reg = <0x30000 0x10000>;
 102                                 read-only;
 103                         };
 104
 105                         factory: partition@40000 {
 106                                 label = "factory";
 107                                 reg = <0x40000 0x10000>;
 108                                 read-only;
 109
 110                                 nvmem-layout {
 111                                         compatible = "fixed-layout";
 112                                         #address-cells = <1>;
 113                                         #size-cells = <1>;
 114
 115                                         eeprom_factory_0: eeprom@0 {
 116                                                 reg = <0x0 0x200>;
 117                                         };
 118
 119                                         macaddr_factory_4: macaddr@4 {
 120                                                 reg = <0x4 0x6>;
 121                                         };
 122                                 };
 123                         };
 124
 125                         partition@50000 {
 126                                 compatible = "denx,uimage";
 127                                 label = "firmware";
 128                                 reg = <0x50000 0x790000>;
 129                         };
 130
 131                         partition@7e0000 {
 132                                 label = "backup";
 133                                 reg = <0x7e0000 0x10000>;
 134                                 read-only;
 135                         };
 136
 137                         partition@7f0000 {
 138                                 label = "storage";
 139                                 reg = <0x7f0000 0x10000>;
 140                                 read-only;
 141                         };
 142                 };
 143         };
 144 };
 145
 146 &ethernet {
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 149
 150         nvmem-cells = <&macaddr_factory_4>;
 151         nvmem-cell-names = "mac-address";
 152
 153         port@5 {
 154                 status = "okay";
 155
 156                 phy-mode = "rgmii";
 157                 mediatek,fixed-link = <1000 1 1 1>;
 158         };
 159
 160         mdio-bus {
 161                 status = "okay";
 162
 163                 ethernet-phy@0 {
 164                         reg = <0>;
 165                         phy-mode = "rgmii";
 166
 167                         qca,ar8327-initvals = <
 168                                 0x04 0x06200000  /* PORT0 PAD MODE CTRL */
 169                                 0x08 0x01000000  /* PORT5 PAD MODE CTRL  RX delay EN all ports 0, 5, 6 */
 170                                 0x7c 0x0000007e  /* PORT0_STATUS */
 171                                 0x94 0x00000000  /* PORT6_STATUS */
 172                         >;
 173                 };
 174         };
 175 };
 176
 177 &gsw {
 178         mediatek,ephy-base = /bits/ 8 <8>;
 179 };
 180
 181 &ehci {
 182         status = "okay";
 183 };
 184
 185 &ohci {
 186         status = "okay";
 187 };
 188
 189 &wmac {
 190         nvmem-cells = <&eeprom_factory_0>;
 191         nvmem-cell-names = "eeprom";
 192 };
 193
 194 &state_default {
 195         gpio {
 196                 groups = "uartf", "i2c", "wled", "spi refclk";
 197                 function = "gpio";
 198         };
 199 };