target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/mtd/partitions/uimage.h>
   8
   9 / {
  10         compatible = "edimax,ew-7478apc", "ralink,mt7620a-soc";
  11         model = "Edimax EW-7478APC";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 reset_wps {
  24                         label = "reset_wps";
  25                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_RESTART>;
  27                 };
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 led_power: power {
  34                         label = "white:power";
  35                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 internet {
  39                         label = "blue:internet";
  40                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 wlan {
  44                         label = "blue:wlan";
  45                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 usb {
  49                         label = "blue:usb";
  50                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  51                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  52                         linux,default-trigger = "usbport";
  53                 };
  54         };
  55 };
  56
  57 &gpio2 {
  58         status = "okay";
  59
  60         enable_usb_power {
  61                 gpio-hog;
  62                 line-name = "enable USB power";
  63                 gpios = <5 GPIO_ACTIVE_HIGH>;
  64                 output-high;
  65         };
  66 };
  67
  68 &spi0 {
  69         status = "okay";
  70
  71         flash@0 {
  72                 compatible = "jedec,spi-nor";
  73                 reg = <0>;
  74                 spi-max-frequency = <10000000>;
  75
  76                 partitions {
  77                         compatible = "fixed-partitions";
  78                         #address-cells = <1>;
  79                         #size-cells = <1>;
  80
  81                         partition@0 {
  82                                 label = "u-boot";
  83                                 reg = <0x0 0x30000>;
  84                                 read-only;
  85                         };
  86
  87                         partition@30000 {
  88                                 label = "u-boot-env";
  89                                 reg = <0x30000 0x10000>;
  90                                 read-only;
  91                         };
  92
  93                         factory: partition@40000 {
  94                                 label = "factory";
  95                                 reg = <0x40000 0x10000>;
  96                                 read-only;
  97
  98                                 nvmem-layout {
  99                                         compatible = "fixed-layout";
 100                                         #address-cells = <1>;
 101                                         #size-cells = <1>;
 102
 103                                         eeprom_factory_0: eeprom@0 {
 104                                                 reg = <0x0 0x200>;
 105                                         };
 106
 107                                         eeprom_factory_8000: eeprom@8000 {
 108                                                 reg = <0x8000 0x200>;
 109                                         };
 110
 111                                         macaddr_factory_4: macaddr@4 {
 112                                                 reg = <0x4 0x6>;
 113                                         };
 114                                 };
 115                         };
 116
 117                         partition@50000 {
 118                                 label = "cimage";
 119                                 reg = <0x50000 0x20000>;
 120                                 read-only;
 121                         };
 122
 123                         partition@70000 {
 124                                 compatible = "openwrt,uimage", "denx,uimage";
 125                                 openwrt,offset = <FW_EDIMAX_OFFSET>;
 126                                 openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 127                                 label = "firmware";
 128                                 reg = <0x00070000 0x00790000>;
 129                         };
 130                 };
 131         };
 132 };
 133
 134 &state_default {
 135         gpio {
 136                 groups = "i2c", "uartf", "nd_sd";
 137                 function = "gpio";
 138         };
 139 };
 140
 141 &ethernet {
 142         pinctrl-names = "default";
 143         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 144
 145         nvmem-cells = <&macaddr_factory_4>;
 146         nvmem-cell-names = "mac-address";
 147
 148         mediatek,portmap = "wllll";
 149
 150         port@5 {
 151                 status = "okay";
 152                 mediatek,fixed-link = <1000 1 1 1>;
 153                 phy-mode = "rgmii";
 154         };
 155
 156         mdio-bus {
 157                 status = "okay";
 158
 159                 phy0: ethernet-phy@0 {
 160                         reg = <0>;
 161                         phy-mode = "rgmii";
 162                 };
 163
 164                 phy1: ethernet-phy@1 {
 165                         reg = <1>;
 166                         phy-mode = "rgmii";
 167                 };
 168
 169                 phy2: ethernet-phy@2 {
 170                         reg = <2>;
 171                         phy-mode = "rgmii";
 172                 };
 173
 174                 phy3: ethernet-phy@3 {
 175                         reg = <3>;
 176                         phy-mode = "rgmii";
 177                 };
 178
 179                 phy4: ethernet-phy@4 {
 180                         reg = <4>;
 181                         phy-mode = "rgmii";
 182                 };
 183
 184                 phy1f: ethernet-phy@1f {
 185                         reg = <0x1f>;
 186                         phy-mode = "rgmii";
 187                 };
 188         };
 189 };
 190
 191 &gsw {
 192         mediatek,ephy-base = /bits/ 8 <12>;
 193 };
 194
 195 &wmac {
 196         nvmem-cells = <&eeprom_factory_0>;
 197         nvmem-cell-names = "eeprom";
 198 };
 199
 200 &pcie {
 201         status = "okay";
 202 };
 203
 204 &pcie0 {
 205         wifi@0,0 {
 206                 reg = <0x0000 0 0 0 0>;
 207                 nvmem-cells = <&eeprom_factory_8000>;
 208                 nvmem-cell-names = "eeprom";
 209                 ieee80211-freq-limit = <5000000 6000000>;
 210         };
 211 };
 212
 213 &ehci {
 214         status = "okay";
 215 };
 216
 217 &ohci {
 218         status = "okay";
 219 };