target/linux/mediatek/dts/mt7986b-netgear-wax220.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/leds/common.h>
   7
   8 #include "mt7986b.dtsi"
   9
  10 / {
  11         model = "Netgear WAX220";
  12         compatible = "netgear,wax220", "mediatek,mt7986b";
  13
  14         aliases {
  15                 serial0 = &uart0;
  16                 led-boot = &led_power_blue;
  17                 led-failsafe = &led_power_amber;
  18                 led-running = &led_power_green;
  19                 led-upgrade = &led_power_amber;
  20         };
  21
  22         gpio-keys {
  23                 compatible = "gpio-keys";
  24
  25                 reset {
  26                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                         label = "reset";
  29                 };
  30         };
  31
  32         chosen {
  33                 stdout-path = "serial0:115200n8";
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38
  39                 wlan5g_green {
  40                         gpios = <&pio 12 GPIO_ACTIVE_LOW>;
  41                         label = "green:wlan5g";
  42                 };
  43
  44                 led_power_amber: power_amber {
  45                         gpios = <&pio 15 GPIO_ACTIVE_LOW>;
  46                         function = LED_FUNCTION_POWER;
  47                         color = <LED_COLOR_ID_AMBER>;
  48                 };
  49
  50                 wlan2g_green {
  51                         gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
  52                         label = "green:wlan2g";
  53                 };
  54
  55                 led_power_blue: power_blue {
  56                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  57                         function = LED_FUNCTION_POWER;
  58                         color = <LED_COLOR_ID_BLUE>;
  59                 };
  60
  61                 led_power_green: power_green {
  62                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  63                         function = LED_FUNCTION_POWER;
  64                         color = <LED_COLOR_ID_GREEN>;
  65                 };
  66
  67                 wlan2g_blue {
  68                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  69                         label = "blue:wlan2g";
  70                 };
  71
  72                 lan_green {
  73                         gpios = <&pio 22 GPIO_ACTIVE_HIGH>;
  74                         function = LED_FUNCTION_LAN;
  75                         color = <LED_COLOR_ID_GREEN>;
  76                 };
  77
  78                 lan_amber {
  79                         gpios = <&pio 13 GPIO_ACTIVE_LOW>;
  80                         function = LED_FUNCTION_LAN;
  81                         color = <LED_COLOR_ID_AMBER>;
  82                 };
  83
  84                 wlan5g_blue {
  85                         gpios = <&pio 2 GPIO_ACTIVE_LOW>;
  86                         label = "blue:wlan5g";
  87                 };
  88         };
  89 };
  90
  91 &crypto {
  92         status = "okay";
  93 };
  94
  95 &eth {
  96         status = "okay";
  97
  98         gmac1: mac@1 {
  99                 compatible = "mediatek,eth-mac";
 100                 reg = <1>;
 101                 phy-handle = <&phy6>;
 102                 phy-mode = "2500base-x";
 103         };
 104
 105         mdio: mdio-bus {
 106                 #address-cells = <1>;
 107                 #size-cells = <0>;
 108         };
 109 };
 110
 111 &mdio {
 112         phy6: ethernet-phy@6 {
 113                 reg = <6>;
 114                 reset-assert-us = <100000>;
 115                 reset-deassert-us = <100000>;
 116                 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
 117                 interrupt-controller;
 118                 #interrupt-cells = <1>;
 119                 interrupt-parent = <&pio>;
 120                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
 121         };
 122 };
 123
 124 &pio {
 125         spi_flash_pins: spi-flash-pins-33-to-38 {
 126                 mux {
 127                         function = "spi";
 128                         groups = "spi0", "spi0_wp_hold";
 129                 };
 130                 conf-pu {
 131                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 132                         drive-strength = <8>;
 133                         mediatek,pull-up-adv = <0>; /* bias-disable */
 134                 };
 135                 conf-pd {
 136                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 137                         drive-strength = <8>;
 138                         mediatek,pull-down-adv = <0>; /* bias-disable */
 139                 };
 140         };
 141
 142         wf_2g_5g_pins: wf_2g_5g-pins {
 143                 mux {
 144                         function = "wifi";
 145                         groups = "wf_2g", "wf_5g";
 146                 };
 147                 conf {
 148                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 149                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 150                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 151                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 152                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 153                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 154                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 155                         drive-strength = <4>;
 156                 };
 157         };
 158
 159         wf_dbdc_pins: wf-dbdc-pins {
 160                 mux {
 161                         function = "wifi";
 162                         groups = "wf_dbdc";
 163                 };
 164                 conf {
 165                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 166                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 167                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 168                                "WF0_TOP_CLK", "WF0_TOP_DATA";
 169                         drive-strength = <4>;
 170                 };
 171         };
 172 };
 173
 174 &spi0 {
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&spi_flash_pins>;
 177         status = "okay";
 178
 179         spi_nand_flash: flash@0 {
 180                 #address-cells = <1>;
 181                 #size-cells = <1>;
 182                 compatible = "spi-nand";
 183                 reg = <0>;
 184
 185                 spi-max-frequency = <20000000>;
 186                 spi-tx-bus-width = <4>;
 187                 spi-rx-bus-width = <4>;
 188
 189                 mediatek,nmbm;
 190                 mediatek,bmt-max-ratio = <1>;
 191                 mediatek,bmt-max-reserved-blocks = <256>;
 192                 mediatek,bmt-remap-range = <0x0 0x580000>;
 193
 194                 partitions: partitions {
 195                         #address-cells = <0x1>;
 196                         #size-cells = <0x1>;
 197                         compatible = "fixed-partitions";
 198
 199                         partition@0 {
 200                                 label = "BL2";
 201                                 read-only;
 202                                 reg = <0x0 0x100000>;
 203                         };
 204
 205                         partition@100000 {
 206                                 label = "u-boot-env";
 207                                 reg = <0x100000 0x80000>;
 208                         };
 209
 210                         factory: partition@180000 {
 211                                 label = "Factory";
 212                                 reg = <0x180000 0x200000>;
 213                         };
 214
 215                         partition@380000 {
 216                                 label = "FIP";
 217                                 reg = <0x380000 0x200000>;
 218                         };
 219
 220                         partition@580000 {
 221                                 label = "ubi";
 222                                 reg = <0x580000 0x5140000>;
 223                         };
 224
 225                         partition@56c0000 {
 226                                 label = "RAE";
 227                                 reg = <0x56c0000 0x400000>;
 228                         };
 229
 230                         partition@5ac0000 {
 231                                 label = "POT";
 232                                 reg = <0x5ac0000 0x100000>;
 233                         };
 234
 235                         partition@5bc0000 {
 236                                 label = "Language";
 237                                 reg = <0x5bc0000 0x400000>;
 238                         };
 239
 240                         partition@5fc0000 {
 241                                 label = "Traffic";
 242                                 reg = <0x5fc0000 0x200000>;
 243                         };
 244
 245                         partition@61c0000 {
 246                                 label = "Cert";
 247                                 reg = <0x61c0000 0x100000>;
 248                         };
 249
 250                         partition@62c0000 {
 251                                 label = "NTGRcryptK";
 252                                 reg = <0x62c0000 0x100000>;
 253                         };
 254
 255                         partition@63c0000 {
 256                                 label = "NTGRcryptD";
 257                                 reg = <0x63c0000 0x500000>;
 258                         };
 259
 260                         partition@68c0000 {
 261                                 label = "LOG";
 262                                 reg = <0x68c0000 0x100000>;
 263                         };
 264
 265                         partition@69c0000 {
 266                                 label = "User_data";
 267                                 reg = <0x69c0000 0x640000>;
 268                         };
 269                 };
 270         };
 271
 272 };
 273
 274 &trng {
 275         status = "okay";
 276 };
 277
 278 &uart0 {
 279         status = "okay";
 280 };
 281
 282 &watchdog {
 283         status = "okay";
 284 };
 285
 286 &wifi {
 287         status = "okay";
 288         pinctrl-names = "default", "dbdc";
 289         pinctrl-0 = <&wf_2g_5g_pins>;
 290         pinctrl-1 = <&wf_dbdc_pins>;
 291
 292         mediatek,mtd-eeprom = <&factory 0x0>;
 293 };