target/linux/mediatek/dts/mt7629-iptime-a6004mx.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include "mt7629.dtsi"
   6
   7 / {
   8         model = "ipTIME A6004MX";
   9         compatible = "iptime,a6004mx", "mediatek,mt7629";
  10
  11         aliases {
  12                 led-boot = &led_cpu;
  13                 led-failsafe = &led_cpu;
  14                 led-running = &led_cpu;
  15                 led-upgrade = &led_cpu;
  16                 serial0 = &uart0;
  17         };
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21                 bootargs-override = "console=ttyS0,115200n8";
  22         };
  23
  24         leds {
  25                 compatible = "gpio-leds";
  26
  27                 led_cpu: cpu {
  28                         label = "orange:cpu";
  29                         gpios = <&pio 57 GPIO_ACTIVE_LOW>;
  30                 };
  31
  32                 wlan5g {
  33                         label = "orange:wlan5g";
  34                         gpios = <&pio 22 GPIO_ACTIVE_LOW>;
  35                         // linux,default-trigger = "phy0radio";
  36                 };
  37
  38                 wlan2g {
  39                         label = "orange:wlan2g";
  40                         gpios = <&pio 21 GPIO_ACTIVE_LOW>;
  41                         // linux,default-trigger = "phy1radio";
  42                 };
  43
  44                 wan {
  45                         label = "orange:wan";
  46                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  47                 };
  48         };
  49
  50         keys {
  51                 compatible = "gpio-keys";
  52
  53                 reset {
  54                         label = "factory";
  55                         linux,code = <KEY_RESTART>;
  56                         gpios = <&pio 60 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 wps {
  60                         label = "wps";
  61                         linux,code = <KEY_WPS_BUTTON>;
  62                         gpios = <&pio 58 GPIO_ACTIVE_LOW>;
  63                 };
  64         };
  65
  66         memory@40000000 {
  67                 device_type = "memory";
  68                 reg = <0x40000000 0x10000000>;
  69         };
  70
  71         reg_3p3v: regulator-3p3v {
  72                 compatible = "regulator-fixed";
  73                 regulator-name = "fixed-3.3V";
  74                 regulator-min-microvolt = <3300000>;
  75                 regulator-max-microvolt = <3300000>;
  76                 regulator-boot-on;
  77                 regulator-always-on;
  78         };
  79
  80         reg_5v: regulator-5v {
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "fixed-5V";
  83                 regulator-min-microvolt = <5000000>;
  84                 regulator-max-microvolt = <5000000>;
  85                 regulator-boot-on;
  86                 regulator-always-on;
  87         };
  88 };
  89
  90 &eth {
  91         pinctrl-names = "default";
  92         pinctrl-0 = <&eth_pins>;
  93         pinctrl-1 = <&ephy_leds_pins>;
  94         status = "okay";
  95
  96         gmac0: mac@0 {
  97                 compatible = "mediatek,eth-mac";
  98                 reg = <0>;
  99                 phy-mode = "2500base-x";
 100                 nvmem-cells = <&macaddr_factory_4 3>;
 101                 nvmem-cell-names = "mac-address";
 102
 103                 fixed-link {
 104                         speed = <2500>;
 105                         full-duplex;
 106                         pause;
 107                 };
 108         };
 109
 110         gmac1: mac@1 {
 111                 compatible = "mediatek,eth-mac";
 112                 reg = <1>;
 113                 phy-mode = "gmii";
 114                 phy-handle = <&phy0>;
 115                 nvmem-cells = <&macaddr_factory_4 1>;
 116                 nvmem-cell-names = "mac-address";
 117         };
 118
 119         mdio: mdio-bus {
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122
 123                 phy0: ethernet-phy@0 {
 124                         reg = <0>;
 125                 };
 126
 127                 switch@2 {
 128                         compatible = "mediatek,mt7531";
 129                         reg = <2>;
 130                         reset-gpios = <&pio 28 0>;
 131                         interrupt-controller;
 132                         #interrupt-cells = <1>;
 133                         interrupt-parent = <&pio>;
 134                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
 135
 136                         ports {
 137                                 #address-cells = <1>;
 138                                 #size-cells = <0>;
 139
 140                                 port@0 {
 141                                         reg = <0>;
 142                                         label = "lan1";
 143                                 };
 144
 145                                 port@1 {
 146                                         reg = <1>;
 147                                         label = "lan2";
 148                                 };
 149
 150                                 port@2 {
 151                                         reg = <2>;
 152                                         label = "lan3";
 153                                 };
 154
 155                                 port@3 {
 156                                         reg = <3>;
 157                                         label = "lan4";
 158                                 };
 159
 160                                 port@6 {
 161                                         reg = <6>;
 162                                         ethernet = <&gmac0>;
 163                                         phy-mode = "2500base-x";
 164
 165                                         fixed-link {
 166                                                 speed = <2500>;
 167                                                 full-duplex;
 168                                                 pause;
 169                                         };
 170                                 };
 171                         };
 172                 };
 173         };
 174 };
 175
 176 &bch {
 177         status = "okay";
 178 };
 179
 180 &snfi {
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&serial_nand_pins>;
 183         status = "okay";
 184         flash@0 {
 185                 compatible = "spi-nand";
 186                 reg = <0>;
 187                 spi-tx-bus-width = <4>;
 188                 spi-rx-bus-width = <4>;
 189                 nand-ecc-engine = <&snfi>;
 190                 mediatek,bmt-v2;
 191
 192                 partitions {
 193                         compatible = "fixed-partitions";
 194                         #address-cells = <1>;
 195                         #size-cells = <1>;
 196
 197                         partition@0 {
 198                                 label = "Bootloader";
 199                                 reg = <0x0 0x100000>;
 200                                 read-only;
 201                         };
 202
 203                         partition@100000 {
 204                                 label = "Config";
 205                                 reg = <0x100000 0x40000>;
 206                         };
 207
 208                         partition@140000 {
 209                                 label = "factory";
 210                                 reg = <0x140000 0x80000>;
 211                                 read-only;
 212
 213                                 nvmem-layout {
 214                                         compatible = "fixed-layout";
 215                                         #address-cells = <1>;
 216                                         #size-cells = <1>;
 217
 218                                         macaddr_factory_4: macaddr@4 {
 219                                                 compatible = "mac-base";
 220                                                 reg = <0x4 0x6>;
 221                                                 #nvmem-cell-cells = <1>;
 222                                         };
 223                                 };
 224                         };
 225
 226                         partition@1c0000 {
 227                                 label = "firmware";
 228                                 reg = <0x1c0000 0x7400000>;
 229                                 compatible = "denx,fit";
 230                                 openwrt,fit-offset = <0x800>;
 231                         };
 232                 };
 233         };
 234 };
 235
 236 &pio {
 237         eth_pins: eth-pins {
 238                 mux {
 239                         function = "eth";
 240                         groups = "mdc_mdio";
 241                 };
 242         };
 243
 244         ephy_leds_pins: ephy-leds-pins {
 245                 mux {
 246                         function = "led";
 247                         groups = "ephy_leds";
 248                 };
 249         };
 250
 251         /* Serial NAND is shared pin with SPI-NOR */
 252         serial_nand_pins: serial-nand-pins {
 253                 mux {
 254                         function = "flash";
 255                         groups = "snfi";
 256                 };
 257         };
 258
 259         uart0_pins: uart0-pins {
 260                 mux {
 261                         function = "uart";
 262                         groups = "uart0_txd_rxd" ;
 263                 };
 264         };
 265
 266         watchdog_pins: watchdog-pins {
 267                 mux {
 268                         function = "watchdog";
 269                         groups = "watchdog";
 270                 };
 271         };
 272 };
 273
 274 &ssusb {
 275         vusb33-supply = <&reg_3p3v>;
 276         vbus-supply = <&reg_5v>;
 277         status = "okay";
 278 };
 279
 280 &uart0 {
 281         pinctrl-names = "default";
 282         pinctrl-0 = <&uart0_pins>;
 283         status = "okay";
 284 };
 285
 286 &watchdog {
 287         pinctrl-names = "default";
 288         pinctrl-0 = <&watchdog_pins>;
 289         status = "okay";
 290
 291         interrupt-controller;
 292         #interrupt-cells = <1>;
 293         interrupt-parent = <&pio>;
 294         interrupts = <GIC_SPI 0x80 IRQ_TYPE_EDGE_FALLING>;
 295 };