target/linux/rockchip/patches-6.1/011-v6.4-arm64-dts-rockchip-fix-gmac-support-for-NanoPi-R5S.patch

   1 From 31425b1fadb2040b359e52ffc24c049a78d56c96 Mon Sep 17 00:00:00 2001
   2 From: Tianling Shen <cnsztl@gmail.com>
   3 Date: Sat, 18 Mar 2023 16:37:44 +0800
   4 Subject: [PATCH] arm64: dts: rockchip: fix gmac support for NanoPi R5S
   5
   6 - Changed phy-mode to rgmii.
   7
   8 - Fixed pull type in pinctrl for gmac0.
   9
  10 - Removed duplicate properties in mdio node.
  11   These properties are defined in the gmac0 node already.
  12
  13 Signed-off-by: Tianling Shen <cnsztl@gmail.com>
  14 Link: https://lore.kernel.org/r/20230318083745.6181-5-cnsztl@gmail.com
  15 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  16 ---
  17  arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts | 7 ++-----
  18  1 file changed, 2 insertions(+), 5 deletions(-)
  19
  20 --- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
  21 +++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
  22 @@ -57,7 +57,7 @@
  23         assigned-clock-rates = <0>, <125000000>;
  24         clock_in_out = "output";
  25         phy-handle = <&rgmii_phy0>;
  26 -       phy-mode = "rgmii-id";
  27 +       phy-mode = "rgmii";
  28         pinctrl-names = "default";
  29         pinctrl-0 = <&gmac0_miim
  30                      &gmac0_tx_bus2
  31 @@ -79,9 +79,6 @@
  32                 reg = <1>;
  33                 pinctrl-0 = <&eth_phy0_reset_pin>;
  34                 pinctrl-names = "default";
  35 -               reset-assert-us = <10000>;
  36 -               reset-deassert-us = <50000>;
  37 -               reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
  38         };
  39  };
  40
  41 @@ -115,7 +112,7 @@
  42  &pinctrl {
  43         gmac0 {
  44                 eth_phy0_reset_pin: eth-phy0-reset-pin {
  45 -                       rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
  46 +                       rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
  47                 };
  48         };
  49