package/boot/uboot-d1/patches/0030-mtd-nand-sunxi-Convert-from-fdtdec-to-ofnode.patch

   1 From 61b63cbb3526e19a0e299f95a3435a237c7c4b4b Mon Sep 17 00:00:00 2001
   2 From: Samuel Holland <samuel@sholland.org>
   3 Date: Sun, 15 May 2022 21:54:25 -0500
   4 Subject: [PATCH 30/90] mtd: nand: sunxi: Convert from fdtdec to ofnode
   5
   6 As a first step toward converting this driver to the driver model, use
   7 the ofnode abstraction to replace direct references to the FDT blob.
   8
   9 Using ofnode_read_u32_index removes an extra pair of loops and makes the
  10 allwinner,rb property optional, matching the devicetree binding.
  11
  12 Signed-off-by: Samuel Holland <samuel@sholland.org>
  13 ---
  14  drivers/mtd/nand/raw/sunxi_nand.c | 73 +++++++++++--------------------
  15  include/fdtdec.h                  |  1 -
  16  lib/fdtdec.c                      |  1 -
  17  3 files changed, 26 insertions(+), 49 deletions(-)
  18
  19 --- a/drivers/mtd/nand/raw/sunxi_nand.c
  20 +++ b/drivers/mtd/nand/raw/sunxi_nand.c
  21 @@ -25,11 +25,10 @@
  22   */
  23
  24  #include <common.h>
  25 -#include <fdtdec.h>
  26 +#include <dm.h>
  27  #include <malloc.h>
  28  #include <memalign.h>
  29  #include <nand.h>
  30 -#include <asm/global_data.h>
  31  #include <dm/device_compat.h>
  32  #include <dm/devres.h>
  33  #include <linux/bitops.h>
  34 @@ -45,8 +44,6 @@
  35  #include <asm/gpio.h>
  36  #include <asm/arch/clock.h>
  37
  38 -DECLARE_GLOBAL_DATA_PTR;
  39 -
  40  #define NFC_REG_CTL            0x0000
  41  #define NFC_REG_ST             0x0004
  42  #define NFC_REG_INT            0x0008
  43 @@ -1605,19 +1602,18 @@ static int sunxi_nand_ecc_init(struct mt
  44         return 0;
  45  }
  46
  47 -static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
  48 +static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum)
  49  {
  50         const struct nand_sdr_timings *timings;
  51 -       const void *blob = gd->fdt_blob;
  52         struct sunxi_nand_chip *chip;
  53         struct mtd_info *mtd;
  54         struct nand_chip *nand;
  55         int nsels;
  56         int ret;
  57         int i;
  58 -       u32 cs[8], rb[8];
  59 +       u32 tmp;
  60
  61 -       if (!fdt_getprop(blob, node, "reg", &nsels))
  62 +       if (!ofnode_get_property(np, "reg", &nsels))
  63                 return -EINVAL;
  64
  65         nsels /= sizeof(u32);
  66 @@ -1638,25 +1634,12 @@ static int sunxi_nand_chip_init(int node
  67         chip->selected = -1;
  68
  69         for (i = 0; i < nsels; i++) {
  70 -               cs[i] = -1;
  71 -               rb[i] = -1;
  72 -       }
  73 -
  74 -       ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
  75 -       if (ret) {
  76 -               dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
  77 -               return ret;
  78 -       }
  79 -
  80 -       ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
  81 -                                  nsels);
  82 -       if (ret) {
  83 -               dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
  84 -               return ret;
  85 -       }
  86 -
  87 -       for (i = 0; i < nsels; i++) {
  88 -               int tmp = cs[i];
  89 +               ret = ofnode_read_u32_index(np, "reg", i, &tmp);
  90 +               if (ret) {
  91 +                       dev_err(nfc->dev, "could not retrieve reg property: %d\n",
  92 +                               ret);
  93 +                       return ret;
  94 +               }
  95
  96                 if (tmp > NFC_MAX_CS) {
  97                         dev_err(nfc->dev,
  98 @@ -1671,15 +1654,14 @@ static int sunxi_nand_chip_init(int node
  99
 100                 chip->sels[i].cs = tmp;
 101
 102 -               tmp = rb[i];
 103 -               if (tmp >= 0 && tmp < 2) {
 104 +               if (!ofnode_read_u32_index(np, "allwinner,rb", i, &tmp) &&
 105 +                   tmp < 2) {
 106                         chip->sels[i].rb.type = RB_NATIVE;
 107                         chip->sels[i].rb.info.nativeid = tmp;
 108                 } else {
 109 -                       ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
 110 -                                               "rb-gpios", i,
 111 -                                               &chip->sels[i].rb.info.gpio,
 112 -                                               GPIOD_IS_IN);
 113 +                       ret = gpio_request_by_name_nodev(np, "rb-gpios", i,
 114 +                                                        &chip->sels[i].rb.info.gpio,
 115 +                                                        GPIOD_IS_IN);
 116                         if (ret)
 117                                 chip->sels[i].rb.type = RB_GPIO;
 118                         else
 119 @@ -1711,7 +1693,7 @@ static int sunxi_nand_chip_init(int node
 120          * in the DT.
 121          */
 122         nand->ecc.mode = NAND_ECC_HW;
 123 -       nand->flash_node = offset_to_ofnode(node);
 124 +       nand->flash_node = np;
 125         nand->select_chip = sunxi_nfc_select_chip;
 126         nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
 127         nand->read_buf = sunxi_nfc_read_buf;
 128 @@ -1760,15 +1742,13 @@ static int sunxi_nand_chip_init(int node
 129         return 0;
 130  }
 131
 132 -static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)
 133 +static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc)
 134  {
 135 -       const void *blob = gd->fdt_blob;
 136 -       int nand_node;
 137 +       ofnode nand_np;
 138         int ret, i = 0;
 139
 140 -       for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
 141 -            nand_node = fdt_next_subnode(blob, nand_node)) {
 142 -               ret = sunxi_nand_chip_init(nand_node, nfc, i++);
 143 +       ofnode_for_each_subnode(nand_np, node) {
 144 +               ret = sunxi_nand_chip_init(nand_np, nfc, i++);
 145                 if (ret)
 146                         return ret;
 147         }
 148 @@ -1794,10 +1774,9 @@ static void sunxi_nand_chips_cleanup(str
 149
 150  void sunxi_nand_init(void)
 151  {
 152 -       const void *blob = gd->fdt_blob;
 153         struct sunxi_nfc *nfc;
 154 -       fdt_addr_t regs;
 155 -       int node;
 156 +       phys_addr_t regs;
 157 +       ofnode node;
 158         int ret;
 159
 160         nfc = kzalloc(sizeof(*nfc), GFP_KERNEL);
 161 @@ -1808,18 +1787,18 @@ void sunxi_nand_init(void)
 162         init_waitqueue_head(&nfc->controller.wq);
 163         INIT_LIST_HEAD(&nfc->chips);
 164
 165 -       node = fdtdec_next_compatible(blob, 0, COMPAT_SUNXI_NAND);
 166 -       if (node < 0) {
 167 +       node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand");
 168 +       if (!ofnode_valid(node)) {
 169                 pr_err("unable to find nfc node in device tree\n");
 170                 goto err;
 171         }
 172
 173 -       if (!fdtdec_get_is_enabled(blob, node)) {
 174 +       if (!ofnode_is_enabled(node)) {
 175                 pr_err("nfc disabled in device tree\n");
 176                 goto err;
 177         }
 178
 179 -       regs = fdtdec_get_addr(blob, node, "reg");
 180 +       regs = ofnode_get_addr(node);
 181         if (regs == FDT_ADDR_T_NONE) {
 182                 pr_err("unable to find nfc address in device tree\n");
 183                 goto err;
 184 --- a/include/fdtdec.h
 185 +++ b/include/fdtdec.h
 186 @@ -187,7 +187,6 @@ enum fdt_compat_id {
 187         COMPAT_INTEL_BAYTRAIL_FSP,      /* Intel Bay Trail FSP */
 188         COMPAT_INTEL_BAYTRAIL_FSP_MDP,  /* Intel FSP memory-down params */
 189         COMPAT_INTEL_IVYBRIDGE_FSP,     /* Intel Ivy Bridge FSP */
 190 -       COMPAT_SUNXI_NAND,              /* SUNXI NAND controller */
 191         COMPAT_ALTERA_SOCFPGA_CLK,      /* SoCFPGA Clock initialization */
 192         COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,   /* SoCFPGA pinctrl-single */
 193         COMPAT_ALTERA_SOCFPGA_H2F_BRG,          /* SoCFPGA hps2fpga bridge */
 194 --- a/lib/fdtdec.c
 195 +++ b/lib/fdtdec.c
 196 @@ -64,7 +64,6 @@ static const char * const compat_names[C
 197         COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
 198         COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
 199         COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
 200 -       COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
 201         COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
 202         COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
 203         COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),