#include "qcom-ipq8064-v1.0.dtsi"
/ {
- model = "Qualcomm IPQ8064/AP148";
- compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
+ model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
+ compatible = "qcom,ipq8064-ap148";
memory@0 {
reg = <0x42000000 0x1e000000>;
};
soc {
- pinmux@800000 {
- i2c4_pins: i2c4_pinmux {
- pins = "gpio12", "gpio13";
- function = "gsbi4";
- bias-disable;
- };
-
- spi_pins: spi_pins {
- mux {
- pins = "gpio18", "gpio19", "gpio21";
- function = "gsbi5";
- drive-strength = <10>;
- bias-none;
- };
- };
- nand_pins: nand_pins {
- mux {
- pins = "gpio34", "gpio35", "gpio36",
- "gpio37", "gpio38", "gpio39",
- "gpio40", "gpio41", "gpio42",
- "gpio43", "gpio44", "gpio45",
- "gpio46", "gpio47";
- function = "nand";
- drive-strength = <10>;
- bias-disable;
- };
- pullups {
- pins = "gpio39";
- bias-pull-up;
- };
- hold {
- pins = "gpio40", "gpio41", "gpio42",
- "gpio43", "gpio44", "gpio45",
- "gpio46", "gpio47";
- bias-bus-hold;
- };
- };
+ mdio0: mdio {
+ compatible = "virtual,mdio-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
+ <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
- mdio0_pins: mdio0_pins {
- mux {
- pins = "gpio0", "gpio1";
- function = "gpio";
- drive-strength = <8>;
- bias-disable;
- };
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ qca,ar8327-initvals = <
+ 0x00004 0x7600000 /* PAD0_MODE */
+ 0x00008 0x1000000 /* PAD5_MODE */
+ 0x0000c 0x80 /* PAD6_MODE */
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
+ 0x000e0 0xc74164de /* SGMII_CTRL */
+ 0x0007c 0x4e /* PORT0_STATUS */
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
};
- rgmii2_pins: rgmii2_pins {
- mux {
- pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
- "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
- function = "rgmii2";
- drive-strength = <8>;
- bias-disable;
- };
+ phy4: ethernet-phy@4 {
+ reg = <4>;
};
};
+ };
+};
- gsbi@16300000 {
- qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
- serial@16340000 {
- status = "ok";
- };
+&qcom_pinmux {
+ i2c4_pins: i2c4_pinmux {
+ pins = "gpio12", "gpio13";
+ function = "gsbi4";
+ bias-disable;
+ };
- /*
- * The i2c device on gsbi4 should not be enabled.
- * On ipq806x designs gsbi4 i2c is meant for exclusive
- * RPM usage. Turning this on in kernel manifests as
- * i2c failure for the RPM.
- */
+ nand_pins: nand_pins {
+ mux {
+ pins = "gpio34", "gpio35", "gpio36",
+ "gpio37", "gpio38", "gpio39",
+ "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45",
+ "gpio46", "gpio47";
+ function = "nand";
+ drive-strength = <10>;
+ bias-disable;
+ };
+ pullups {
+ pins = "gpio39";
+ bias-pull-up;
+ };
+ hold {
+ pins = "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45",
+ "gpio46", "gpio47";
+ bias-bus-hold;
};
+ };
- gsbi5: gsbi@1a200000 {
- qcom,mode = <GSBI_PROT_SPI>;
- status = "ok";
-
- spi4: spi@1a280000 {
- status = "ok";
- spi-max-frequency = <50000000>;
-
- pinctrl-0 = <&spi_pins>;
- pinctrl-names = "default";
-
- cs-gpios = <&qcom_pinmux 20 0>;
-
- flash: m25p80@0 {
- compatible = "s25fl256s1";
- #address-cells = <1>;
- #size-cells = <1>;
- spi-max-frequency = <50000000>;
- reg = <0>;
-
- partitions {
- compatible = "qcom,smem";
- };
- };
- };
+ mdio0_pins: mdio0_pins {
+ mux {
+ pins = "gpio0", "gpio1";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
};
+ };
- sata-phy@1b400000 {
- status = "ok";
+ rgmii2_pins: rgmii2_pins {
+ mux {
+ pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
+ function = "rgmii2";
+ drive-strength = <8>;
+ bias-disable;
};
+ };
+};
- sata@29000000 {
- status = "ok";
- };
+&adm_dma {
+ status = "okay";
+};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
- };
+&gsbi4 {
+ qcom,mode = <GSBI_PROT_I2C_UART>;
+ status = "okay";
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
+ serial@16340000 {
+ status = "okay";
+ };
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
+ /*
+ * The i2c device on gsbi4 should not be enabled.
+ * On ipq806x designs gsbi4 i2c is meant for exclusive
+ * RPM usage. Turning this on in kernel manifests as
+ * i2c failure for the RPM.
+ */
+};
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
+&gsbi5 {
+ qcom,mode = <GSBI_PROT_SPI>;
+ status = "okay";
- usb30@0 {
- status = "ok";
- };
+ spi4: spi@1a280000 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
- usb30@1 {
- status = "ok";
- };
+ pinctrl-0 = <&spi_pins>;
+ pinctrl-names = "default";
- pcie0: pci@1b500000 {
- status = "ok";
- };
+ cs-gpios = <&qcom_pinmux 20 0>;
+
+ flash: m25p80@0 {
+ compatible = "s25fl256s1";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
- pcie1: pci@1b700000 {
- status = "ok";
- force_gen1 = <1>;
+ partitions {
+ compatible = "qcom,smem";
+ };
};
+ };
+};
- nand@1ac00000 {
- status = "ok";
+&usb3_0 {
+ status = "okay";
+};
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
+&usb3_1 {
+ status = "okay";
+};
- cs0 {
- reg = <0>;
- compatible = "qcom,nandcs";
+&pcie0 {
+ status = "okay";
+};
- nand-ecc-strength = <4>;
- nand-bus-width = <8>;
- nand-ecc-step-size = <512>;
+&pcie1 {
+ status = "okay";
+ force_gen1 = <1>;
+};
- partitions {
- compatible = "qcom,smem";
- };
- };
- };
+&nand {
+ status = "okay";
- mdio0: mdio {
- compatible = "virtual,mdio-gpio";
- #address-cells = <1>;
- #size-cells = <0>;
- gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
- pinctrl-0 = <&mdio0_pins>;
- pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
- phy0: ethernet-phy@0 {
- reg = <0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x000e4 0x6a545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- >;
- };
+ cs0 {
+ reg = <0>;
+ compatible = "qcom,nandcs";
- phy4: ethernet-phy@4 {
- reg = <4>;
- };
+ nand-ecc-strength = <4>;
+ nand-bus-width = <8>;
+ nand-ecc-step-size = <512>;
+
+ partitions {
+ compatible = "qcom,smem";
};
+ };
+};
- gmac1: ethernet@37200000 {
- status = "ok";
- phy-mode = "rgmii";
- qcom,id = <1>;
+&gmac1 {
+ status = "okay";
+ phy-mode = "rgmii";
+ qcom,id = <1>;
- pinctrl-0 = <&rgmii2_pins>;
- pinctrl-names = "default";
+ pinctrl-0 = <&rgmii2_pins>;
+ pinctrl-names = "default";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
- gmac2: ethernet@37400000 {
- status = "ok";
- phy-mode = "sgmii";
- qcom,id = <2>;
+&gmac2 {
+ status = "okay";
+ phy-mode = "sgmii";
+ qcom,id = <2>;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
};
};
-&adm_dma {
- status = "ok";
+&sata_phy {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
};
/ {
model = "Qualcomm IPQ8064/AP161";
- compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
+ compatible = "qcom,ipq8064-ap161";
memory@0 {
reg = <0x42000000 0x1e000000>;
};
chosen {
- linux,stdout-path = "serial0:115200n8";
+ stdout-path = "serial0:115200n8";
};
soc {
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
- status = "ok";
+ status = "okay";
spi4: spi@1a280000 {
- status = "ok";
+ status = "okay";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
- status = "ok";
+ status = "okay";
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
};
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
- };
-
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
force_gen1 = <1>;
};
pcie2: pci@1b900000 {
- status = "ok";
+ status = "okay";
};
nand@1ac00000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};
gmac0: ethernet@37000000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <0>;
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
mdiobus = <&mdio0>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
mdiobus = <&mdio0>;
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
/ {
model = "TP-Link Archer C2600";
- compatible = "tplink,c2600", "qcom,ipq8064";
+ compatible = "tplink,c2600";
memory@0 {
reg = <0x42000000 0x1e000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
- status = "ok";
+ status = "okay";
spi5: spi@1a280000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
};
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
- };
-
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
pinctrl-0 = <&usb0_pwr_en_pin>;
pinctrl-names = "default";
};
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
pinctrl-0 = <&usb1_pwr_en_pin>;
pinctrl-names = "default";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
force_gen1 = <1>;
};
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
+
/ {
model = "Netgear Nighthawk X4 D7800";
- compatible = "netgear,d7800", "qcom,ipq8064";
+ compatible = "netgear,d7800";
memory@0 {
reg = <0x42000000 0xe000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
ports-implemented = <0x1>;
- status = "ok";
+ status = "okay";
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
- };
-
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
pinctrl-0 = <&usb0_pwr_en_pins>;
pinctrl-names = "default";
};
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
pinctrl-0 = <&usb1_pwr_en_pins>;
pinctrl-names = "default";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
};
nand@1ac00000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
- cs0 {
+ flash@0 {
reg = <0>;
compatible = "qcom,nandcs";
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy4>;
qcom,id = <1>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
/ {
model = "Qualcomm IPQ8064/DB149";
- compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
+ compatible = "qcom,ipq8064-db149";
reserved-memory {
#address-cells = <1>;
gsbi2: gsbi@12480000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
uart2: serial@12490000 {
- status = "ok";
+ status = "okay";
};
};
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
- status = "ok";
+ status = "okay";
spi4: spi@1a280000 {
- status = "ok";
+ status = "okay";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
- status = "ok";
+ status = "okay";
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
};
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
- };
-
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
};
pcie2: pci@1b900000 {
- status = "ok";
+ status = "okay";
};
mdio0: mdio {
};
gmac0: ethernet@37000000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <0>;
phy-handle = <&phy4>;
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <1>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
phy-handle = <&phy6>;
};
gmac3: ethernet@37600000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <3>;
phy-handle = <&phy7>;
/ {
model = "Linksys EA8500 WiFi Router";
- compatible = "linksys,ea8500", "qcom,ipq8064";
+ compatible = "linksys,ea8500";
memory@0 {
reg = <0x42000000 0x1e000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
- status = "ok";
- };
-
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
+ status = "okay";
};
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
};
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
- };
-
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
force_gen1 = <1>;
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
};
pcie2: pci@1b900000 {
};
nand@1ac00000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
qcom,phy_mdio_addr = <4>;
};
//lan
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
qcom,phy_mdio_addr = <0>; /* none */
};
adm_dma: dma@18300000 {
- status = "ok";
+ status = "okay";
};
};
/ {
model = "Netgear Nighthawk X4 R7500";
- compatible = "netgear,r7500", "qcom,ipq8064";
+ compatible = "netgear,r7500";
memory@0 {
reg = <0x42000000 0xe000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
- status = "ok";
+ status = "okay";
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- clocks = <&gcc USB30_0_UTMI_CLK>;
- status = "ok";
- };
-
- phy@100f8830 { /* USB3 port 1 SS phy */
- clocks = <&gcc USB30_0_MASTER_CLK>;
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- clocks = <&gcc USB30_1_UTMI_CLK>;
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- clocks = <&gcc USB30_1_MASTER_CLK>;
- status = "ok";
- };
-
- usb30@0 {
+ usb3_0: usb3@110f8800 {
clocks = <&gcc USB30_1_MASTER_CLK>;
- status = "ok";
+ status = "okay";
};
- usb30@1 {
+ usb3_1: usb3@100f8800 {
clocks = <&gcc USB30_0_MASTER_CLK>;
- status = "ok";
+ status = "okay";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
force_gen1 = <1>;
};
nand@1ac00000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
/ {
model = "Netgear Nighthawk X4 R7500v2";
- compatible = "netgear,r7500v2", "qcom,ipq8064";
+ compatible = "netgear,r7500v2";
memory@0 {
reg = <0x42000000 0x1e000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
- status = "ok";
+ status = "okay";
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
- };
-
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
pinctrl-0 = <&usb0_pwr_en_pins>;
pinctrl-names = "default";
};
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
pinctrl-0 = <&usb1_pwr_en_pins>;
pinctrl-names = "default";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
};
nand@1ac00000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
ubi@1880000 {
label = "ubi";
- reg = <0x1880000 0x6080000>;
+ reg = <0x1880000 0x1C00000>;
+ };
+
+ netgear@3480000 {
+ label = "netgear";
+ reg = <0x3480000 0x4480000>;
+ read-only;
};
reserve@7900000 {
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
/ {
soc: soc {
- ss_phy_0: phy@110f8830 {
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <0xa0>;
- };
-
- ss_phy_1: phy@100f8830 {
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <0xa0>;
- };
-
pcie0: pci@1b500000 {
phy-tx0-term-offset = <0>;
};
};
};
};
+
+&ss_phy_0 {
+ rx_eq = <2>;
+ tx_deamp_3_5db = <32>;
+ mpll = <0xa0>;
+};
+
+&ss_phy_1 {
+ rx_eq = <2>;
+ tx_deamp_3_5db = <32>;
+ mpll = <0xa0>;
+};
/ {
model = "TP-Link Archer VR2600v";
- compatible = "tplink,vr2600v", "qcom,ipq8064";
+ compatible = "tplink,vr2600v";
memory@0 {
reg = <0x42000000 0x1e000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
- status = "ok";
+ status = "okay";
spi4: spi@1a280000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
};
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
};
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
- };
-
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
force_gen1 = <1>;
};
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
/ {
model = "NEC Aterm WG2600HP";
- compatible = "nec,wg2600hp", "qcom,ipq8064";
+ compatible = "nec,wg2600hp";
memory@0 {
reg = <0x42000000 0x1e000000>;
};
};
-&hs_phy_0 { /* USB3 port 0 HS phy */
- status = "okay";
-};
-
-&ss_phy_0 { /* USB3 port 0 SS phy */
- status = "okay";
-};
-
-&hs_phy_1 { /* USB3 port 1 HS phy */
- status = "okay";
-};
-
-&ss_phy_1 { /* USB3 port 1 SS phy */
- status = "okay";
-};
-
&usb3_0 {
status = "okay";
+// SPDX-License-Identifier: BSD-3-Clause
/*
* BSD LICENSE
*
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
- compatible = "compex,wpq864", "qcom,ipq8064";
+ compatible = "compex,wpq864";
model = "Compex WPQ864";
aliases {
pinctrl-0 = <&rpm_pins>;
pinctrl-names = "default";
};
-
- nand@1ac00000 {
- status = "okay";
-
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
-
- mt29f2g08abbeah4@0 {
- compatible = "qcom,nandcs";
-
- reg = <0>;
-
- nand-ecc-strength = <4>;
- nand-bus-width = <8>;
- nand-ecc-step-size = <512>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- SBL1@0 {
- label = "SBL1";
- reg = <0x0000000 0x0040000>;
- read-only;
- };
-
- MIBIB@40000 {
- label = "MIBIB";
- reg = <0x0040000 0x0140000>;
- read-only;
- };
-
- SBL2@180000 {
- label = "SBL2";
- reg = <0x0180000 0x0140000>;
- read-only;
- };
-
- SBL3@2c0000 {
- label = "SBL3";
- reg = <0x02c0000 0x0280000>;
- read-only;
- };
-
- DDRCONFIG@540000 {
- label = "DDRCONFIG";
- reg = <0x0540000 0x0120000>;
- read-only;
- };
-
- SSD@660000 {
- label = "SSD";
- reg = <0x0660000 0x0120000>;
- read-only;
- };
-
- TZ@780000 {
- label = "TZ";
- reg = <0x0780000 0x0280000>;
- read-only;
- };
-
- RPM@a00000 {
- label = "RPM";
- reg = <0x0a00000 0x0280000>;
- read-only;
- };
-
- APPSBL@c80000 {
- label = "APPSBL";
- reg = <0x0c80000 0x0500000>;
- read-only;
- };
-
- APPSBLENV@1180000 {
- label = "APPSBLENV";
- reg = <0x1180000 0x0080000>;
- };
-
- ART@1200000 {
- label = "ART";
- reg = <0x1200000 0x0140000>;
- };
-
- ubi@1340000 {
- label = "ubi";
- reg = <0x1340000 0x4000000>;
- };
-
- BOOTCONFIG@5340000 {
- label = "BOOTCONFIG";
- reg = <0x5340000 0x0060000>;
- };
-
- SBL2-1@53a0000- {
- label = "SBL2_1";
- reg = <0x53a0000 0x0140000>;
- read-only;
- };
-
- SBL3-1@54e0000 {
- label = "SBL3_1";
- reg = <0x54e0000 0x0280000>;
- read-only;
- };
-
- DDRCONFIG-1@5760000 {
- label = "DDRCONFIG_1";
- reg = <0x5760000 0x0120000>;
- read-only;
- };
-
- SSD-1@5880000 {
- label = "SSD_1";
- reg = <0x5880000 0x0120000>;
- read-only;
- };
-
- TZ-1@59a0000 {
- label = "TZ_1";
- reg = <0x59a0000 0x0280000>;
- read-only;
- };
-
- RPM-1@5c20000 {
- label = "RPM_1";
- reg = <0x5c20000 0x0280000>;
- read-only;
- };
-
- BOOTCONFIG1@5ea0000 {
- label = "BOOTCONFIG1";
- reg = <0x5ea0000 0x0060000>;
- };
-
- APPSBL-1@5f00000 {
- label = "APPSBL_1";
- reg = <0x5f00000 0x0500000>;
- read-only;
- };
-
- ubi-1@6400000 {
- label = "ubi_1";
- reg = <0x6400000 0x4000000>;
- };
-
- unused@a400000 {
- label = "unused";
- reg = <0xa400000 0x5c00000>;
- };
- };
- };
- };
};
+#if 0
mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
+ <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
ethernet-phy@0 {
reg = <0>;
reg = <4>;
};
};
+#endif
+
+ mdio0: mdio@37000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
+
+ phy_port1: ethernet-phy@0 {
+ reg = <0>;
+#if 0
+ qca,ar8327-initvals = <
+ 0x00004 0x7600000 /* PAD0_MODE = RMII MASTER+SLAVE ENABLE CLOCK INVERSE, MAC0 RGMII + TXDELAY */
+ 0x00008 0x1000000 /* PAD5_MODE = RGMII_RX_DELAY_EN */
+ 0x0000c 0x80 /* PAD6_MODE = SGMII*/
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
+ 0x000e0 0xc74164de /* SGMII_CTRL = */
+ 0x0007c 0x4e /* PORT0_STATUS */
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
+#endif
+ };
+
+ phy_port2: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: ethernet-phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: ethernet-phy@4 {
+ reg = <4>;
+ };
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ asym-pause;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&phy_port1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ phy-handle = <&phy_port3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-handle = <&phy_port5>;
+ };
+
+ /*
+ port@6 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ asym-pause;
+ };
+ };
+ */
+ };
+ };
+ };
leds {
compatible = "gpio-leds";
fixed-link {
speed = <1000>;
full-duplex;
+ pause;
+ asym-pause;
};
};
fixed-link {
speed = <1000>;
full-duplex;
+ pause;
+ asym-pause;
};
};
};
};
-&hs_phy_0 { /* USB3 port 0 HS phy */
- status = "okay";
-};
-
-&hs_phy_1 { /* USB3 port 1 HS phy */
- status = "okay";
-};
-
-&ss_phy_0 { /* USB3 port 0 SS phy */
- status = "okay";
-
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <160>;
-};
-
-&ss_phy_1 { /* USB3 port 1 SS phy */
- status = "okay";
-
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <160>;
-};
-
&pcie0 {
status = "okay";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
&tcsr {
qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
};
+
+&nand {
+ status = "okay";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ flash@0 {
+ compatible = "qcom,nandcs";
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-bus-width = <8>;
+ nand-ecc-step-size = <512>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ SBL1@0 {
+ label = "SBL1";
+ reg = <0x0000000 0x0040000>;
+ read-only;
+ };
+
+ MIBIB@40000 {
+ label = "MIBIB";
+ reg = <0x0040000 0x0140000>;
+ read-only;
+ };
+
+ SBL2@180000 {
+ label = "SBL2";
+ reg = <0x0180000 0x0140000>;
+ read-only;
+ };
+
+ SBL3@2c0000 {
+ label = "SBL3";
+ reg = <0x02c0000 0x0280000>;
+ read-only;
+ };
+
+ DDRCONFIG@540000 {
+ label = "DDRCONFIG";
+ reg = <0x0540000 0x0120000>;
+ read-only;
+ };
+
+ SSD@660000 {
+ label = "SSD";
+ reg = <0x0660000 0x0120000>;
+ read-only;
+ };
+
+ TZ@780000 {
+ label = "TZ";
+ reg = <0x0780000 0x0280000>;
+ read-only;
+ };
+
+ RPM@a00000 {
+ label = "RPM";
+ reg = <0x0a00000 0x0280000>;
+ read-only;
+ };
+
+ APPSBL@c80000 {
+ label = "APPSBL";
+ reg = <0x0c80000 0x0500000>;
+ read-only;
+ };
+
+ APPSBLENV@1180000 {
+ label = "APPSBLENV";
+ reg = <0x1180000 0x0080000>;
+ };
+
+ ART@1200000 {
+ label = "ART";
+ reg = <0x1200000 0x0140000>;
+ };
+
+ ubi@1340000 {
+ label = "ubi";
+ reg = <0x1340000 0x4000000>;
+ };
+
+ BOOTCONFIG@5340000 {
+ label = "BOOTCONFIG";
+ reg = <0x5340000 0x0060000>;
+ };
+
+ SBL2-1@53a0000- {
+ label = "SBL2_1";
+ reg = <0x53a0000 0x0140000>;
+ read-only;
+ };
+
+ SBL3-1@54e0000 {
+ label = "SBL3_1";
+ reg = <0x54e0000 0x0280000>;
+ read-only;
+ };
+
+ DDRCONFIG-1@5760000 {
+ label = "DDRCONFIG_1";
+ reg = <0x5760000 0x0120000>;
+ read-only;
+ };
+
+ SSD-1@5880000 {
+ label = "SSD_1";
+ reg = <0x5880000 0x0120000>;
+ read-only;
+ };
+
+ TZ-1@59a0000 {
+ label = "TZ_1";
+ reg = <0x59a0000 0x0280000>;
+ read-only;
+ };
+
+ RPM-1@5c20000 {
+ label = "RPM_1";
+ reg = <0x5c20000 0x0280000>;
+ read-only;
+ };
+
+ BOOTCONFIG1@5ea0000 {
+ label = "BOOTCONFIG1";
+ reg = <0x5ea0000 0x0060000>;
+ };
+
+ APPSBL-1@5f00000 {
+ label = "APPSBL_1";
+ reg = <0x5f00000 0x0500000>;
+ read-only;
+ };
+
+ ubi-1@6400000 {
+ label = "ubi_1";
+ reg = <0x6400000 0x4000000>;
+ };
+
+ unused@a400000 {
+ label = "unused";
+ reg = <0xa400000 0x5c00000>;
+ };
+ };
+ };
+};
/ {
model = "Buffalo WXR-2533DHP";
- compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
+ compatible = "buffalo,wxr-2533dhp";
memory@42000000 {
reg = <0x42000000 0x1e000000>;
};
&gmac2 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
};
};
-&hs_phy_0 { /* USB3 port 0 HS phy */
- status = "okay";
-};
-
-&ss_phy_0 { /* USB3 port 0 SS phy */
- status = "okay";
-};
-
-&hs_phy_1 { /* USB3 port 1 HS phy */
- status = "okay";
-};
-
-&ss_phy_1 { /* USB3 port 1 SS phy */
- status = "okay";
-};
-
&usb3_0 {
status = "okay";
output-high;
};
};
-};
\ No newline at end of file
+};
+// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "skeleton.dtsi"
CPU_SPC: spc {
compatible = "qcom,idle-state-spc",
"arm,idle-state";
+ status = "okay";
entry-latency-us = <400>;
exit-latency-us = <900>;
min-residency-us = <3000>;
cpu-pmu {
compatible = "qcom,krait-pmu";
- interrupts = <1 10 0x304>;
+ interrupts = <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
};
reserved-memory {
clock-names = "ahbix-clk",
"mi2s-osr-clk",
"mi2s-bit-clk";
- interrupts = <0 85 1>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "lpass-irq-lpaif";
reg = <0x28100000 0x10000>;
reg-names = "lpass-lpaif";
reg = <0x108000 0x1000>;
qcom,ipc = <&l2cc 0x8 2>;
- interrupts = <0 19 0>,
- <0 21 0>,
- <0 22 0>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ack",
"err",
"wakeup";
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- interrupts = <0 16 0x4>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
pcie0_pins: pcie0_pinmux {
mux {
pins = "gpio3";
function = "pcie1_rst";
- drive-strength = <2>;
+ drive-strength = <12>;
bias-disable;
};
};
mux {
pins = "gpio48";
function = "pcie2_rst";
- drive-strength = <2>;
+ drive-strength = <12>;
bias-disable;
};
};
mux {
pins = "gpio63";
function = "pcie3_rst";
- drive-strength = <2>;
+ drive-strength = <12>;
bias-disable;
output-low;
};
};
+
+ spi_pins: spi_pins {
+ mux {
+ pins = "gpio18", "gpio19", "gpio21";
+ function = "gsbi5";
+ drive-strength = <10>;
+ bias-none;
+ };
+ };
+
+ leds_pins: leds_pins {
+ mux {
+ pins = "gpio7", "gpio8", "gpio9",
+ "gpio26", "gpio53";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-down;
+ output-low;
+ };
+ };
+
+ buttons_pins: buttons_pins {
+ mux {
+ pins = "gpio54";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
};
intc: interrupt-controller@2000000 {
};
timer@200a000 {
- compatible = "qcom,kpss-timer", "qcom,msm-timer";
- interrupts = <1 1 0x301>,
- <1 2 0x301>,
- <1 3 0x301>,
- <1 4 0x301>,
- <1 5 0x301>;
+ compatible = "qcom,kpss-timer",
+ "qcom,kpss-wdt-ipq8064", "qcom,msm-timer";
+ interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_EDGE_RISING)>,
+ <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_EDGE_RISING)>,
+ <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_EDGE_RISING)>,
+ <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_EDGE_RISING)>,
+ <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_EDGE_RISING)>;
reg = <0x0200a000 0x100>;
clock-frequency = <25000000>,
<32768>;
};
saw0: regulator@2089000 {
- compatible = "qcom,saw2", "syscon";
+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
regulator;
};
saw1: regulator@2099000 {
- compatible = "qcom,saw2", "syscon";
+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
regulator;
};
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12490000 0x1000>,
<0x12480000 0x1000>;
- interrupts = <0 195 0x0>;
+ interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI2_UART_CLK>, <&gcc GSBI2_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
i2c@124a0000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
- interrupts = <0 196 0>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
clock-names = "core", "iface";
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16340000 0x1000>,
<0x16300000 0x1000>;
- interrupts = <0 152 0x0>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
i2c@16380000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x16380000 0x1000>;
- interrupts = <0 153 0>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI4_QUP_CLK>, <&gcc GSBI4_H_CLK>;
clock-names = "core", "iface";
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x1a240000 0x1000>,
<0x1a200000 0x1000>;
- interrupts = <0 154 0x0>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
i2c@1a280000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x1a280000 0x1000>;
- interrupts = <0 155 0>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
spi@1a280000 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a280000 0x1000>;
- interrupts = <0 155 0>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
};
};
+ gsbi7: gsbi@16600000 {
+ status = "disabled";
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <7>;
+ reg = <0x16600000 0x100>;
+ clocks = <&gcc GSBI7_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ syscon-tcsr = <&tcsr>;
+
+ gsbi7_serial: serial@16640000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x16640000 0x1000>,
+ <0x16600000 0x1000>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+ };
+
sata_phy: sata-phy@1b400000 {
compatible = "qcom,ipq806x-sata-phy";
reg = <0x1b400000 0x200>;
status = "disabled";
};
- sata@29000000 {
+ sata: sata@29000000 {
compatible = "qcom,ipq806x-ahci", "generic-ahci";
reg = <0x29000000 0x180>;
- ports-implemented = <0x1>;
-
- interrupts = <0 209 0x0>;
+ interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SFAB_SATA_S_H_CLK>,
<&gcc SATA_H_CLK>,
reg = <0x900000 0x3680>;
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
- interrupts = <0 178 0>;
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};
compatible = "syscon";
reg = <0x01200600 0x100>;
};
+
+ hs_phy_0: hs_phy_0 {
+ compatible = "qcom,dwc3-hs-usb-phy";
+ regmap = <&usb3_0>;
+ clocks = <&gcc USB30_0_UTMI_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
- hs_phy_1: phy@100f8800 {
- compatible = "qcom,dwc3-hs-usb-phy";
- reg = <0x100f8800 0x30>;
- clocks = <&gcc USB30_1_UTMI_CLK>;
- clock-names = "ref";
- #phy-cells = <0>;
-
- status = "disabled";
- };
-
- ss_phy_1: phy@100f8830 {
- compatible = "qcom,dwc3-ss-usb-phy";
- reg = <0x100f8830 0x30>;
- clocks = <&gcc USB30_1_MASTER_CLK>;
- clock-names = "ref";
- #phy-cells = <0>;
-
- status = "disabled";
- };
-
- hs_phy_0: phy@110f8800 {
- compatible = "qcom,dwc3-hs-usb-phy";
- reg = <0x110f8800 0x30>;
- clocks = <&gcc USB30_0_UTMI_CLK>;
- clock-names = "ref";
- #phy-cells = <0>;
-
- status = "disabled";
- };
-
- ss_phy_0: phy@110f8830 {
- compatible = "qcom,dwc3-ss-usb-phy";
- reg = <0x110f8830 0x30>;
- clocks = <&gcc USB30_0_MASTER_CLK>;
- clock-names = "ref";
- #phy-cells = <0>;
-
- status = "disabled";
- };
+ ss_phy_0: ss_phy_0 {
+ compatible = "qcom,dwc3-ss-usb-phy";
+ regmap = <&usb3_0>;
+ clocks = <&gcc USB30_0_MASTER_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
- usb3_0: usb30@0 {
- compatible = "qcom,dwc3";
+ usb3_0: usb3@110f8800 {
+ compatible = "qcom,dwc3", "syscon";
#address-cells = <1>;
#size-cells = <1>;
+ reg = <0x110f8800 0x8000>;
clocks = <&gcc USB30_0_MASTER_CLK>;
clock-names = "core";
ranges;
resets = <&gcc USB30_0_MASTER_RESET>;
- reset-names = "usb30_0_mstr_rst";
+ reset-names = "master";
status = "disabled";
dwc3_0: dwc3@11000000 {
compatible = "snps,dwc3";
reg = <0x11000000 0xcd00>;
- interrupts = <0 110 0x4>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
phys = <&hs_phy_0>, <&ss_phy_0>;
phy-names = "usb2-phy", "usb3-phy";
dr_mode = "host";
snps,dis_u3_susphy_quirk;
};
};
+
+ hs_phy_1: hs_phy_1 {
+ compatible = "qcom,dwc3-hs-usb-phy";
+ regmap = <&usb3_1>;
+ clocks = <&gcc USB30_1_UTMI_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
- usb3_1: usb30@1 {
- compatible = "qcom,dwc3";
+ ss_phy_1: ss_phy_1 {
+ compatible = "qcom,dwc3-ss-usb-phy";
+ regmap = <&usb3_1>;
+ clocks = <&gcc USB30_1_MASTER_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ usb3_1: usb3@100f8800 {
+ compatible = "qcom,dwc3", "syscon";
#address-cells = <1>;
#size-cells = <1>;
+ reg = <0x100f8800 0x8000>;
clocks = <&gcc USB30_1_MASTER_CLK>;
clock-names = "core";
ranges;
resets = <&gcc USB30_1_MASTER_RESET>;
- reset-names = "usb30_1_mstr_rst";
+ reset-names = "master";
status = "disabled";
dwc3_1: dwc3@10000000 {
compatible = "snps,dwc3";
reg = <0x10000000 0xcd00>;
- interrupts = <0 205 0x4>;
+ interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
phys = <&hs_phy_1>, <&ss_phy_1>;
phy-names = "usb2-phy", "usb3-phy";
dr_mode = "host";
ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
- interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
- interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
- interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
adm_dma: dma@18300000 {
compatible = "qcom,adm";
reg = <0x18300000 0x100000>;
- interrupts = <0 170 0>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
status = "disabled";
};
- nand@1ac00000 {
+ nand: nand@1ac00000 {
compatible = "qcom,ipq806x-nand";
reg = <0x1ac00000 0x800>;
};
gmac0: ethernet@37000000 {
- device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37000000 0x200000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
};
gmac1: ethernet@37200000 {
- device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37200000 0x200000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
};
gmac2: ethernet@37400000 {
- device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37400000 0x200000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
};
gmac3: ethernet@37600000 {
- device_type = "network";
compatible = "qcom,ipq806x-gmac";
reg = <0x37600000 0x200000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
sdcc1bam:dma@12402000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12402000 0x8000>;
- interrupts = <0 98 0>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SDC1_H_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
sdcc3bam:dma@12182000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12182000 0x8000>;
- interrupts = <0 96 0>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc SDC3_H_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
};
amba {
- compatible = "arm,amba-bus";
+ compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
+
sdcc1: sdcc@12400000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
/ {
model = "ZyXEL NBG6817";
- compatible = "zyxel,nbg6817", "qcom,ipq8065";
+ compatible = "zyxel,nbg6817";
memory@0 {
reg = <0x42000000 0x1e000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
- status = "ok";
+ status = "okay";
spi4: spi@1a280000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
};
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
- };
-
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
+ usb3_0: usb3@110f8800 {
+ status = "okay";
pinctrl-0 = <&usb0_pwr_en_pins>;
pinctrl-names = "default";
};
- usb30@1 {
- status = "ok";
+ usb3_1: usb3@100f8800 {
+ status = "okay";
pinctrl-0 = <&usb1_pwr_en_pins>;
pinctrl-names = "default";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
qcom,phy_mdio_addr = <4>;
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
qcom,phy_mdio_addr = <0>; /* none */
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
/ {
model = "Netgear Nighthawk X4S R7800";
- compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
+ compatible = "netgear,r7800";
memory@0 {
reg = <0x42000000 0x1e000000>;
gsbi@16300000 {
qcom,mode = <GSBI_PROT_I2C_UART>;
- status = "ok";
+ status = "okay";
serial@16340000 {
- status = "ok";
+ status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
};
sata-phy@1b400000 {
- status = "ok";
+ status = "okay";
};
sata@29000000 {
ports-implemented = <0x1>;
- status = "ok";
+ status = "okay";
};
- phy@100f8800 { /* USB3 port 1 HS phy */
- status = "ok";
- };
-
- phy@100f8830 { /* USB3 port 1 SS phy */
- status = "ok";
- };
-
- phy@110f8800 { /* USB3 port 0 HS phy */
- status = "ok";
- };
-
- phy@110f8830 { /* USB3 port 0 SS phy */
- status = "ok";
- };
-
- usb30@0 {
- status = "ok";
-
+ usb3_0: usb3@110f8800 {
+ status = "okay";
+
pinctrl-0 = <&usb0_pwr_en_pins>;
pinctrl-names = "default";
};
- usb30@1 {
- status = "ok";
-
+ usb3_1: usb3@100f8800 {
+ status = "okay";
+
pinctrl-0 = <&usb1_pwr_en_pins>;
pinctrl-names = "default";
};
pcie0: pci@1b500000 {
- status = "ok";
+ status = "okay";
+
+ bridge@0,0 {
+ reg = <0x00000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ wifi@1,0 {
+ compatible = "pci168c,0046";
+ reg = <0x00010000 0 0 0 0>;
+
+ mtd-mac-address = <&art 6>;
+ mtd-mac-address-increment = <(1)>;
+ };
+ };
};
pcie1: pci@1b700000 {
- status = "ok";
+ status = "okay";
force_gen1 = <1>;
+
+ bridge@0,0 {
+ reg = <0x00000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ wifi@1,0 {
+ compatible = "pci168c,0046";
+ reg = <0x00010000 0 0 0 0>;
+
+ mtd-mac-address = <&art 6>;
+ mtd-mac-address-increment = <(2)>;
+ };
+ };
};
nand@1ac00000 {
- status = "ok";
+ status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};
gmac1: ethernet@37200000 {
- status = "ok";
+ status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
qcom,phy_mdio_addr = <4>;
fixed-link {
speed = <1000>;
full-duplex;
+ pause;
+ asym-pause;
};
};
gmac2: ethernet@37400000 {
- status = "ok";
+ status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
qcom,phy_mdio_addr = <0>; /* none */
fixed-link {
speed = <1000>;
full-duplex;
+ pause;
+ asym-pause;
};
};
};
};
&adm_dma {
- status = "ok";
+ status = "okay";
};
};
};
};
+
+ cpus {
+ idle-states {
+ CPU_SPC: spc {
+ status = "disabled";
+ };
+ };
+ };
};
projects / openwrt / staging / ynezz.git / commitdiff