stm32mp1: add support for LpDDR3
authorYann Gautier <yann.gautier@st.com>
Tue, 16 Apr 2019 14:20:58 +0000 (16:20 +0200)
committerYann Gautier <yann.gautier@st.com>
Mon, 2 Sep 2019 15:52:29 +0000 (17:52 +0200)
This change enables LpDDR3 initialization with PMIC.

Change-Id: I2409a808335dfacd69a8517cb8510cee98bb8161
Signed-off-by: Yann Gautier <yann.gautier@st.com>
drivers/st/ddr/stm32mp1_ddr.c
drivers/st/pmic/stm32mp_pmic.c
plat/st/stm32mp1/stm32mp1_def.h

index caf8eefa8d4e3718bd1e5f830f62150033db96d0..7d89d027e60da11740006b6c1d8f8e84afe6b326 100644 (file)
@@ -717,6 +717,8 @@ void stm32mp1_ddr_init(struct ddr_info *priv,
                ret = board_ddr_power_init(STM32MP_DDR3);
        } else if ((config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) != 0U) {
                ret = board_ddr_power_init(STM32MP_LPDDR2);
+       } else if ((config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) != 0U) {
+               ret = board_ddr_power_init(STM32MP_LPDDR3);
        } else {
                ERROR("DDR type not supported\n");
        }
index 6fe51f443d7c9bbff7dd7513eb241ba2d115ca38..9e9dddc4d0b02e0d182051ce160e904cd99f2dc6 100644 (file)
@@ -299,6 +299,7 @@ int pmic_ddr_power_init(enum ddr_type ddr_type)
                break;
 
        case STM32MP_LPDDR2:
+       case STM32MP_LPDDR3:
                /*
                 * Set LDO3 to 1.8V
                 * Set LDO3 to bypass mode if BUCK3 = 1.8V
index 77a95e68aa5eaf97a647643d042f5324a43b511f..0eba8a6451cc1334ac294a2518ad016cd1f97226 100644 (file)
@@ -66,6 +66,7 @@
 enum ddr_type {
        STM32MP_DDR3,
        STM32MP_LPDDR2,
+       STM32MP_LPDDR3
 };
 #endif