c1832ee49feeb318b854080ceb4c0a3be7e19230
[openwrt/staging/aparcar.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf18a.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
4
5
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 model = "ZTE MF18A";
14 compatible = "zte,mf18a";
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
21 };
22
23 chosen {
24 /*
25 * bootargs forced by u-boot bootipq command:
26 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 */
28 bootargs-append = " root=/dev/ubiblock0_1";
29 };
30
31 gpio-restart {
32 compatible = "gpio-restart";
33 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 led_internal: led-0 {
40 label = "blue:internal";
41 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
42 default-state = "keep";
43 };
44
45 led_power: led-1 {
46 label = "blue:power";
47 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
48 default-state = "keep";
49 };
50
51 led-2 {
52 function = LED_FUNCTION_WLAN;
53 label = "blue:wlan";
54 gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
55 linux,default-trigger = "phy0tpt";
56 };
57
58 led-3 {
59 label = "red:wlan";
60 gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
61 };
62
63 led-4 {
64 function = LED_FUNCTION_WLAN;
65 label = "blue:smart";
66 gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
67 linux,default-trigger = "phy1tpt";
68 };
69
70 led-5 {
71 label = "red:smart";
72 gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
73 };
74
75 resetzwave {
76 label = "resetzwave";
77 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
78 };
79 };
80
81 keys {
82 compatible = "gpio-keys";
83
84 reset {
85 label = "reset";
86 linux,code = <KEY_RESTART>;
87 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
88 };
89
90 wps {
91 label = "wps";
92 linux,code = <KEY_WPS_BUTTON>;
93 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
94 };
95 };
96
97 soc {
98 rng@22000 {
99 status = "okay";
100 };
101
102 mdio@90000 {
103 status = "okay";
104 pinctrl-0 = <&mdio_pins>;
105 pinctrl-names = "default";
106 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
107 reset-delay-us = <2000>;
108 };
109
110 tcsr@1949000 {
111 compatible = "qcom,tcsr";
112 reg = <0x1949000 0x100>;
113 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
114 };
115
116 tcsr@194b000 {
117 /* select hostmode */
118 compatible = "qcom,tcsr";
119 reg = <0x194b000 0x100>;
120 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
121 status = "okay";
122 };
123
124 ess_tcsr@1953000 {
125 compatible = "qcom,tcsr";
126 reg = <0x1953000 0x1000>;
127 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
128 };
129
130 tcsr@1957000 {
131 compatible = "qcom,tcsr";
132 reg = <0x1957000 0x100>;
133 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
134 };
135
136 usb2@60f8800 {
137 status = "okay";
138 };
139
140 usb3@8af8800 {
141 status = "okay";
142 };
143
144 crypto@8e3a000 {
145 status = "okay";
146 };
147
148 watchdog@b017000 {
149 status = "okay";
150 };
151 };
152 };
153
154 &blsp_dma {
155 status = "okay";
156 };
157
158 &blsp1_spi1 {
159 pinctrl-0 = <&spi_0_pins>;
160 pinctrl-names = "default";
161 status = "okay";
162 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
163
164 flash@0 {
165 /* u-boot is looking for "n25q128a11" property */
166 compatible = "jedec,spi-nor", "n25q128a11";
167 #address-cells = <1>;
168 #size-cells = <1>;
169 reg = <0>;
170 spi-max-frequency = <24000000>;
171
172 partitions {
173 compatible = "fixed-partitions";
174 #address-cells = <1>;
175 #size-cells = <1>;
176
177 partition@0 {
178 label = "0:SBL1";
179 reg = <0x0 0x40000>;
180 read-only;
181 };
182
183 partition@40000 {
184 label = "0:MIBIB";
185 reg = <0x40000 0x20000>;
186 read-only;
187 };
188
189 partition@60000 {
190 label = "0:QSEE";
191 reg = <0x60000 0x60000>;
192 read-only;
193 };
194
195 partition@c0000 {
196 label = "0:CDT";
197 reg = <0xc0000 0x10000>;
198 read-only;
199 };
200
201 partition@d0000 {
202 label = "0:DDRPARAMS";
203 reg = <0xd0000 0x10000>;
204 read-only;
205 };
206
207 partition@e0000 {
208 label = "0:APPSBLENV";
209 reg = <0xe0000 0x10000>;
210 read-only;
211 };
212
213 partition@f0000 {
214 label = "0:APPSBL";
215 reg = <0xf0000 0xc0000>;
216 read-only;
217 };
218
219 partition@1b0000 {
220 label = "0:reserved1";
221 reg = <0x1b0000 0x50000>;
222 read-only;
223 };
224 };
225 };
226 };
227
228 &blsp1_uart1 {
229 pinctrl-0 = <&serial_pins>;
230 pinctrl-names = "default";
231 status = "okay";
232 };
233
234 &cryptobam {
235 status = "okay";
236 };
237
238 &gmac {
239 status = "okay";
240 nvmem-cell-names = "mac-address";
241 nvmem-cells = <&macaddr_config_0>;
242 };
243
244 &switch {
245 status = "okay";
246 };
247
248 &swport2 {
249 status = "okay";
250
251 label = "wan";
252
253 nvmem-cell-names = "mac-address";
254 nvmem-cells = <&macaddr_config_0>;
255 mac-address-increment = <1>;
256 };
257
258 &swport3 {
259 status = "okay";
260
261 label = "lan";
262 };
263
264 &nand {
265 pinctrl-0 = <&nand_pins>;
266 pinctrl-names = "default";
267 status = "okay";
268
269 nand@0 {
270 partitions {
271 compatible = "fixed-partitions";
272 #address-cells = <1>;
273 #size-cells = <1>;
274
275 partition@0 {
276 label = "fota-flag";
277 reg = <0x0 0xa0000>;
278 read-only;
279 };
280
281 partition@a0000 {
282 label = "ART";
283 reg = <0xa0000 0x80000>;
284 read-only;
285 compatible = "nvmem-cells";
286 #address-cells = <1>;
287 #size-cells = <1>;
288
289 precal_art_1000: precal@1000 {
290 reg = <0x1000 0x2f20>;
291 };
292
293 precal_art_9000: precal@9000 {
294 reg = <0x9000 0x2f20>;
295 };
296 };
297
298 partition@120000 {
299 label = "mac";
300 reg = <0x120000 0x80000>;
301 read-only;
302 compatible = "nvmem-cells";
303 #address-cells = <1>;
304 #size-cells = <1>;
305
306 macaddr_config_0: macaddr@0 {
307 reg = <0x0 0x6>;
308 };
309 };
310
311 partition@1a0000 {
312 label = "reserved2";
313 reg = <0x1a0000 0xc0000>;
314 read-only;
315 };
316
317 partition@260000 {
318 label = "cfg-param";
319 reg = <0x260000 0x400000>;
320 read-only;
321 };
322
323 partition@660000 {
324 label = "log";
325 reg = <0x660000 0x400000>;
326 };
327
328 partition@a60000 {
329 label = "oops";
330 reg = <0xa60000 0xa0000>;
331 };
332
333 partition@b00000 {
334 label = "reserved3";
335 reg = <0xb00000 0x500000>;
336 read-only;
337 };
338
339 partition@1000000 {
340 label = "web";
341 reg = <0x1000000 0x800000>;
342 };
343
344 partition@1800000 {
345 label = "rootfs";
346 reg = <0x1800000 0x1d00000>;
347 };
348
349 partition@3500000 {
350 label = "data";
351 reg = <0x3500000 0x1900000>;
352 };
353
354 partition@4e00000 {
355 label = "fota";
356 reg = <0x4e00000 0x2800000>;
357
358 };
359 partition@7600000 {
360 label = "iot-db";
361 reg = <0x7600000 0xa00000>;
362 };
363 };
364 };
365 };
366
367 &qpic_bam {
368 status = "okay";
369 };
370
371 &tlmm {
372 i2c_0_pins: i2c_0_pinmux {
373 mux {
374 pins = "gpio20", "gpio21";
375 function = "blsp_i2c0";
376 bias-disable;
377 };
378 };
379
380 mdio_pins: mdio_pinmux {
381 mux_1 {
382 pins = "gpio6";
383 function = "mdio";
384 bias-pull-up;
385 };
386
387 mux_2 {
388 pins = "gpio7";
389 function = "mdc";
390 bias-pull-up;
391 };
392 };
393
394 nand_pins: nand_pins {
395 pullups {
396 pins = "gpio52", "gpio53", "gpio58",
397 "gpio59";
398 function = "qpic";
399 bias-pull-up;
400 };
401
402 pulldowns {
403 pins = "gpio54", "gpio55", "gpio56",
404 "gpio57", "gpio60",
405 "gpio62", "gpio63", "gpio64",
406 "gpio65", "gpio66", "gpio67",
407 "gpio69";
408 function = "qpic";
409 bias-pull-down;
410 };
411 };
412
413 serial_pins: serial_pinmux {
414 mux {
415 pins = "gpio16", "gpio17";
416 function = "blsp_uart0";
417 bias-disable;
418 };
419 };
420
421 spi_0_pins: spi_0_pinmux {
422 pinmux {
423 function = "blsp_spi0";
424 pins = "gpio13", "gpio14", "gpio15";
425 drive-strength = <12>;
426 bias-disable;
427 };
428
429 pinmux_cs {
430 function = "gpio";
431 pins = "gpio12";
432 drive-strength = <2>;
433 bias-disable;
434 output-high;
435 };
436 };
437 };
438
439 &usb2_hs_phy {
440 status = "okay";
441 };
442
443 &usb3_ss_phy {
444 status = "okay";
445 };
446
447 &usb3_hs_phy {
448 status = "okay";
449 };
450
451 &wifi0 {
452 status = "okay";
453 nvmem-cell-names = "pre-calibration", "mac-address";
454 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0>;
455 mac-address-increment = <2>;
456 qcom,ath10k-calibration-variant = "zte,mf18a";
457 };
458
459 //* This node is used for 5Ghz on QCA9982 */
460 &pcie0 {
461 status = "okay";
462 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
463 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
464 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
465
466 bridge@0,0 {
467 reg = <0x00000000 0 0 0 0>;
468 #address-cells = <3>;
469 #size-cells = <2>;
470 ranges;
471
472 wifi2: wifi@1,0 {
473 compatible = "pci168c,0040";
474 nvmem-cell-names = "pre-calibration", "mac-address";
475 nvmem-cells = <&precal_art_9000>, <&macaddr_config_0>;
476 mac-address-increment = <3>;
477 reg = <0x00010000 0 0 0 0>;
478 };
479 };
480 };
481
482