bcm27xx: update 6.1 patches to latest version
[openwrt/staging/svanheule.git] / target / linux / bcm27xx / patches-6.1 / 950-1073-spi-dw-dma-Get-the-last-DMA-scoop-out-of-the-FIFO.patch
1 From 686fe776309fba5cad642c40177d39bf1fb320b2 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Tue, 7 Nov 2023 14:49:47 +0000
4 Subject: [PATCH] spi: dw-dma: Get the last DMA scoop out of the FIFO
5
6 With a DMA FIFO threshold greater than 1 (encoded as 0), it is possible
7 for data in the FIFO to be inaccessible, causing the transfer to fail
8 after a timeout. If the transfer includes a transmission, reduce the
9 RX threshold when the TX completes, otherwise use 1 for the whole
10 transfer (inefficient, but not catastrophic at SPI data rates).
11
12 See: https://github.com/raspberrypi/linux/issues/5696
13
14 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
15 ---
16 drivers/spi/spi-dw-dma.c | 6 +++++-
17 1 file changed, 5 insertions(+), 1 deletion(-)
18
19 --- a/drivers/spi/spi-dw-dma.c
20 +++ b/drivers/spi/spi-dw-dma.c
21 @@ -275,8 +275,10 @@ static void dw_spi_dma_tx_done(void *arg
22 struct dw_spi *dws = arg;
23
24 clear_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy);
25 - if (test_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy))
26 + if (test_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy)) {
27 + dw_writel(dws, DW_SPI_DMARDLR, 0);
28 return;
29 + }
30
31 complete(&dws->dma_completion);
32 }
33 @@ -602,6 +604,8 @@ static int dw_spi_dma_transfer(struct dw
34
35 nents = max(xfer->tx_sg.nents, xfer->rx_sg.nents);
36
37 + dw_writel(dws, DW_SPI_DMARDLR, xfer->tx_buf ? (dws->rxburst - 1) : 0);
38 +
39 /*
40 * Execute normal DMA-based transfer (which submits the Rx and Tx SG
41 * lists directly to the DMA engine at once) if either full hardware