target/linux/starfive/patches-6.1/0037-dt-bindings-soc-starfive-Add-StarFive-syscon-module.patch

   1 From 27d38dda7527414eb84ef471425e96c9d2566b38 Mon Sep 17 00:00:00 2001
   2 From: William Qiu <william.qiu@starfivetech.com>
   3 Date: Thu, 6 Apr 2023 15:46:13 +0800
   4 Subject: [PATCH 037/122] dt-bindings: soc: starfive: Add StarFive syscon
   5  module
   6
   7 Add documentation to describe StarFive System Controller Registers.
   8
   9 Signed-off-by: William Qiu <william.qiu@starfivetech.com>
  10 ---
  11  .../soc/starfive/starfive,jh7110-syscon.yaml  | 58 +++++++++++++++++++
  12  MAINTAINERS                                   |  6 ++
  13  2 files changed, 64 insertions(+)
  14  create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
  15
  16 --- /dev/null
  17 +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
  18 @@ -0,0 +1,58 @@
  19 +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  20 +%YAML 1.2
  21 +---
  22 +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
  23 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  24 +
  25 +title: StarFive JH7110 SoC system controller
  26 +
  27 +maintainers:
  28 +  - William Qiu <william.qiu@starfivetech.com>
  29 +
  30 +description: |
  31 +  The StarFive JH7110 SoC system controller provides register information such
  32 +  as offset, mask and shift to configure related modules such as MMC and PCIe.
  33 +
  34 +properties:
  35 +  compatible:
  36 +    oneOf:
  37 +      - items:
  38 +          - enum:
  39 +              - starfive,jh7110-aon-syscon
  40 +              - starfive,jh7110-sys-syscon
  41 +          - const: syscon
  42 +          - const: simple-mfd
  43 +      - items:
  44 +          - const: starfive,jh7110-stg-syscon
  45 +          - const: syscon
  46 +
  47 +  reg:
  48 +    maxItems: 1
  49 +
  50 +  clock-controller:
  51 +    $ref: /schemas/clock/starfive,jh7110-pll.yaml#
  52 +    type: object
  53 +
  54 +  power-controller:
  55 +    $ref: /schemas/power/starfive,jh7110-pmu.yaml#
  56 +    type: object
  57 +
  58 +required:
  59 +  - compatible
  60 +  - reg
  61 +
  62 +additionalProperties: false
  63 +
  64 +examples:
  65 +  - |
  66 +    syscon@10240000 {
  67 +        compatible = "starfive,jh7110-stg-syscon", "syscon";
  68 +        reg = <0x10240000 0x1000>;
  69 +    };
  70 +
  71 +    syscon@13030000 {
  72 +        compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
  73 +        reg = <0x13030000 0x1000>;
  74 +    };
  75 +
  76 +...
  77 --- a/MAINTAINERS
  78 +++ b/MAINTAINERS
  79 @@ -19663,6 +19663,11 @@ S:     Supported
  80  F:     Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
  81  F:     drivers/clk/starfive/clk-starfive-jh7110-pll.*
  82
  83 +STARFIVE JH7110 SYSCON
  84 +M:     William Qiu <william.qiu@starfivetech.com>
  85 +S:     Supported
  86 +F:     Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
  87 +
  88  STARFIVE JH71X0 CLOCK DRIVERS
  89  M:     Emil Renner Berthing <kernel@esmil.dk>
  90  M:     Hal Feng <hal.feng@starfivetech.com>
  91 @@ -19693,6 +19698,7 @@ STARFIVE SOC DRIVER
  92  M:     Conor Dooley <conor@kernel.org>
  93  S:     Maintained
  94  T:     git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
  95 +F:     Documentation/devicetree/bindings/soc/starfive/
  96  F:     drivers/soc/starfive/
  97  F:     include/soc/starfive/
  98