target/linux/realtek/dts-5.15/rtl931x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/interrupt-controller/mips-gic.h>
   4
   5 / {
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8
   9         compatible = "realtek,rtl838x-soc";
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14                 frequency = <1000000000>;
  15
  16                 cpu@0 {
  17                         compatible = "mti,interaptive";
  18                         reg = <0>;
  19                 };
  20
  21                 cpu@1 {
  22                         compatible = "mti,interaptive";
  23                         reg = <1>;
  24                 };
  25         };
  26
  27         memory@0 {
  28                 device_type = "memory";
  29                 reg = <0x0 0x10000000>;
  30         };
  31
  32         aliases {
  33                 serial0 = &uart0;
  34                 serial1 = &uart1;
  35         };
  36
  37         chosen {
  38                 bootargs = "earlycon";
  39                 stdout-path = "serial0:115200n8";
  40         };
  41
  42         lx_clk: lx_clk {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 clock-frequency = <200000000>;
  46         };
  47
  48         cpuclock: cpuclock@0 {
  49                 #clock-cells = <0>;
  50                 compatible = "fixed-clock";
  51
  52                 /* FIXME: there should be way to detect this */
  53                 clock-frequency = <1000000000>;
  54         };
  55
  56         cpuintc: cpuintc {
  57                 compatible = "mti,cpu-interrupt-controller";
  58                 #address-cells = <0>;
  59                 #interrupt-cells = <1>;
  60                 interrupt-controller;
  61         };
  62
  63         gic: interrupt-controller@1ddc0000 {
  64                 compatible = "mti,gic";
  65                 reg = <0x1ddc0000 0x20000>;
  66
  67                 interrupt-controller;
  68                 #interrupt-cells = <3>;
  69
  70                 /*
  71                  * Declare the interrupt-parent even though the mti,gic
  72                  * binding doesn't require it, such that the kernel can
  73                  * figure out that cpu_intc is the root interrupt
  74                  * controller & should be probed first.
  75                  */
  76                 interrupt-parent = <&cpuintc>;
  77
  78                 timer {
  79                         compatible = "mti,gic-timer";
  80                         interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
  81                         clocks = <&cpuclock>;
  82                 };
  83         };
  84
  85         soc: soc {
  86                 compatible = "simple-bus";
  87                 #address-cells = <1>;
  88                 #size-cells = <1>;
  89                 ranges = <0x0 0x18000000 0x10000>;
  90
  91                 spi0: spi@1200 {
  92                         status = "okay";
  93
  94                         compatible = "realtek,rtl8380-spi";
  95                         reg = <0x1200 0x100>;
  96
  97                         #address-cells = <1>;
  98                         #size-cells = <0>;
  99                 };
 100
 101                 watchdog0: watchdog@3260 {
 102                         compatible = "realtek,rtl9310-wdt";
 103                         reg = <0x3260 0xc>;
 104
 105                         realtek,reset-mode = "soc";
 106
 107                         clocks = <&lx_clk>;
 108                         timeout-sec = <30>;
 109
 110                         interrupt-parent = <&gic>;
 111                         interrupt-names = "phase1", "phase2";
 112                         interrupts = <GIC_SHARED 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 9 IRQ_TYPE_LEVEL_HIGH>;
 113                 };
 114
 115                 gpio0: gpio-controller@3300 {
 116                         compatible = "realtek,rtl9310-gpio", "realtek,otto-gpio";
 117                         reg = <0x3300 0x1c>;
 118
 119                         gpio-controller;
 120                         #gpio-cells = <2>;
 121                         ngpios = <32>;
 122
 123                         interrupt-controller;
 124                         #interrupt-cells = <3>;
 125                         interrupt-parent = <&gic>;
 126                         interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
 127                 };
 128
 129                 uart0: uart@2000 {
 130                         compatible = "ns16550a";
 131                         reg = <0x2000 0x100>;
 132
 133                         clock-frequency = <200000000>;
 134
 135                         interrupt-parent = <&gic>;
 136                         #interrupt-cells = <3>;
 137                         interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
 138
 139                         reg-io-width = <1>;
 140                         reg-shift = <2>;
 141                         fifo-size = <1>;
 142                         no-loopback-test;
 143                 };
 144
 145                 uart1: uart@2100 {
 146                         compatible = "ns16550a";
 147                         reg = <0x2100 0x100>;
 148
 149                         clock-frequency = <200000000>;
 150
 151                         interrupt-parent = <&gic>;
 152                         #interrupt-cells = <3>;
 153                         interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
 154
 155                         reg-io-width = <1>;
 156                         reg-shift = <2>;
 157                         fifo-size = <1>;
 158                         no-loopback-test;
 159
 160                         status = "disabled";
 161                 };
 162         };
 163
 164         pinmux: pinmux@1b001358 {
 165                 compatible = "pinctrl-single";
 166                 reg = <0x1b001358 0x4>;
 167
 168                 pinctrl-single,bit-per-mux;
 169                 pinctrl-single,register-width = <32>;
 170                 pinctrl-single,function-mask = <0x1>;
 171                 #pinctrl-cells = <2>;
 172
 173                 /* Enable GPIO6 and GPIO7, possibly unknown others */
 174                 pinmux_disable_jtag: disable_jtag {
 175                         pinctrl-single,bits = <0x0 0x0 0x8000>;
 176                 };
 177
 178                 /* Controls GPIO0 */
 179                 pinmux_disable_sys_led: disable_sys_led {
 180                         pinctrl-single,bits = <0x0 0x0 0x100>;
 181                 };
 182         };
 183
 184         ethernet0: ethernet@1b00a300 {
 185                 status = "okay";
 186                 compatible = "realtek,rtl838x-eth";
 187                 reg = <0x1b00a300 0x100>;
 188                 interrupt-parent = <&gic>;
 189                 #interrupt-cells = <3>;
 190                 interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
 191                 phy-mode = "internal";
 192                 fixed-link {
 193                         speed = <1000>;
 194                         full-duplex;
 195                 };
 196         };
 197
 198         switch0: switch@1b000000 {
 199                 compatible = "realtek,rtl83xx-switch";
 200                 status = "okay";
 201
 202                 interrupt-parent = <&gic>;
 203                 #interrupt-cells = <3>;
 204                 interrupts = <GIC_SHARED 15 IRQ_TYPE_LEVEL_HIGH>;
 205         };
 206 };