ramips: 6.1: copy config and patches
[openwrt/staging/robimarko.git] / target / linux / ramips / patches-6.1 / 007-v6.5-clk-ralink-mtmips-Fix-uninitialized-use-of-ret-in-mt.patch
1 From 6e68dae946e3a0333fbde5487ce163142ca10ae0 Mon Sep 17 00:00:00 2001
2 From: Nathan Chancellor <nathan@kernel.org>
3 Date: Thu, 22 Jun 2023 15:56:19 +0000
4 Subject: clk: ralink: mtmips: Fix uninitialized use of ret in
5 mtmips_register_{fixed,factor}_clocks()
6
7 Clang warns:
8
9 drivers/clk/ralink/clk-mtmips.c:309:9: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized]
10 309 | return ret;
11 | ^~~
12 drivers/clk/ralink/clk-mtmips.c:285:9: note: initialize the variable 'ret' to silence this warning
13 285 | int ret, i;
14 | ^
15 | = 0
16 drivers/clk/ralink/clk-mtmips.c:359:9: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized]
17 359 | return ret;
18 | ^~~
19 drivers/clk/ralink/clk-mtmips.c:335:9: note: initialize the variable 'ret' to silence this warning
20 335 | int ret, i;
21 | ^
22 | = 0
23 2 errors generated.
24
25 Set ret to the return value of clk_hw_register_fixed_rate() using the
26 PTR_ERR() macro, which ensures ret is not used uninitialized, clearing
27 up the warning.
28
29 Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
30 Closes: https://github.com/ClangBuiltLinux/linux/issues/1879
31 Signed-off-by: Nathan Chancellor <nathan@kernel.org>
32 Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
33 Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
34 Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
35 ---
36 drivers/clk/ralink/clk-mtmips.c | 2 ++
37 1 file changed, 2 insertions(+)
38
39 --- a/drivers/clk/ralink/clk-mtmips.c
40 +++ b/drivers/clk/ralink/clk-mtmips.c
41 @@ -292,6 +292,7 @@ static int mtmips_register_fixed_clocks(
42 sclk->parent, 0,
43 sclk->rate);
44 if (IS_ERR(sclk->hw)) {
45 + ret = PTR_ERR(sclk->hw);
46 pr_err("Couldn't register fixed clock %d\n", idx);
47 goto err_clk_unreg;
48 }
49 @@ -342,6 +343,7 @@ static int mtmips_register_factor_clocks
50 sclk->parent, sclk->flags,
51 sclk->mult, sclk->div);
52 if (IS_ERR(sclk->hw)) {
53 + ret = PTR_ERR(sclk->hw);
54 pr_err("Couldn't register factor clock %d\n", idx);
55 goto err_clk_unreg;
56 }