target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3710i.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5
   6 /include/ "fsl/p1020si-pre.dtsi"
   7 / {
   8         model = "Enterasys WS-AP3710i";
   9         compatible = "enterasys,ws-ap3710i";
  10
  11         aliases {
  12                 ethernet0 = &enet0;
  13                 ethernet1 = &enet2;
  14                 led-boot = &led_power_green;
  15                 led-failsafe = &led_power_red;
  16                 led-running = &led_power_green;
  17                 led-upgrade = &led_power_red;
  18                 label-mac-device = &enet0;
  19         };
  20
  21         chosen {
  22                 bootargs-override = "console=ttyS0,115200";
  23                 stdout-path = &serial0;
  24         };
  25
  26         memory {
  27                 device_type = "memory";
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 wifi1 {
  34                         gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
  35                         label = "ws-ap3710i:green:radio1";
  36                         linux,default-trigger = "phy0tpt";
  37                 };
  38
  39                 wifi2 {
  40                         gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  41                         label = "ws-ap3710i:green:radio2";
  42                         linux,default-trigger = "phy1tpt";
  43                 };
  44
  45                 led_power_green: power_green {
  46                         gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  47                         label = "ws-ap3710i:green:power";
  48                 };
  49
  50                 led_power_red: power_red {
  51                         gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
  52                         label = "ws-ap3710i:red:power";
  53                 };
  54         };
  55
  56         keys {
  57                 compatible = "gpio-keys";
  58
  59                 reset {
  60                         label = "Reset button";
  61                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  62                         linux,code = <KEY_RESTART>;
  63                 };
  64         };
  65
  66         lbc: localbus@ffe05000 {
  67                 reg = <0 0xffe05000 0 0x1000>;
  68                 ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
  69
  70                 nor@0 {
  71                         #address-cells = <1>;
  72                         #size-cells = <1>;
  73                         compatible = "cfi-flash";
  74                         reg = <0x0 0x0 0x2000000>;
  75                         bank-width = <2>;
  76                         device-width = <1>;
  77
  78                         partitions {
  79                                 compatible = "fixed-partitions";
  80                                 #address-cells = <1>;
  81                                 #size-cells = <1>;
  82
  83                                 partition@0 {
  84                                         compatible = "denx,uimage";
  85                                         reg = <0x0 0x1d80000>;
  86                                         label = "firmware";
  87                                 };
  88
  89                                 partition@1d80000 {
  90                                         reg = <0x1d80000 0x80000>;
  91                                         label = "u-boot";
  92                                         read-only;
  93                                 };
  94
  95                                 partition@1e00000 {
  96                                         reg = <0x1e00000 0x100000>;
  97                                         label = "nvram";
  98                                         read-only;
  99                                 };
 100
 101                                 partition@1f00000 {
 102                                         reg = <0x1f00000 0x20000>;
 103                                         label = "cfg2";
 104                                         read-only;
 105                                 };
 106
 107                                 partition@1f20000 {
 108                                         reg = <0x1f20000 0x20000>;
 109                                         label = "cfg1";
 110                                         read-only;
 111                                 };
 112                         };
 113                 };
 114         };
 115
 116         soc: soc@ffe00000 {
 117                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 118
 119                 gpio0: gpio-controller@fc00 {
 120                 };
 121
 122                 mdio@24000 {
 123                         phy4: ethernet-phy@4 {
 124                                 reg = <0x4>;
 125                                 reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 126                         };
 127                 };
 128
 129                 enet0: ethernet@b0000 {
 130                         phy-connection-type = "rgmii-id";
 131                         phy-handle = <&phy4>;
 132                 };
 133
 134                 enet1: ethernet@b1000 {
 135                         status = "disabled";
 136                 };
 137
 138                 enet2: ethernet@b2000 {
 139                         status = "disabled";
 140                 };
 141
 142                 usb@22000 {
 143                         status = "disabled";
 144                 };
 145
 146                 usb@23000 {
 147                         status = "disabled";
 148                 };
 149         };
 150
 151         pci0: pcie@ffe09000 {
 152                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 153                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 154                 reg = <0 0xffe09000 0 0x1000>;
 155
 156                 /* Filled by U-Boot */
 157                 bus-range = <0x00 0x01>;
 158                 dma-ranges = <0x2000000 0x00 0xfff00000 0x00 0xffe00000
 159                               0x00 0x100000 0x42000000 0x00 0x00 0x00
 160                               0x00 0x00 0x10000000>;
 161
 162                 pcie@0 {
 163                         ranges = <0x2000000 0x0 0xa0000000
 164                                   0x2000000 0x0 0xa0000000
 165                                   0x0 0x20000000
 166
 167                                   0x1000000 0x0 0x0
 168                                   0x1000000 0x0 0x0
 169                                   0x0 0x100000>;
 170                 };
 171         };
 172
 173         pci1: pcie@ffe0a000 {
 174                 reg = <0 0xffe0a000 0 0x1000>;
 175                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 176                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 177
 178                 /* Filled by U-Boot */
 179                 bus-range = <0x00 0x01>;
 180                 dma-ranges = <0x2000000 0x00 0xfff00000 0x00
 181                               0xffe00000 0x00 0x100000 0x42000000
 182                               0x00 0x00 0x00 0x00 0x00 0x10000000>;
 183
 184                 pcie@0 {
 185                         ranges = <0x2000000 0x0 0x80000000
 186                                   0x2000000 0x0 0x80000000
 187                                   0x0 0x20000000
 188
 189                                   0x1000000 0x0 0x0
 190                                   0x1000000 0x0 0x0
 191                                   0x0 0x100000>;
 192                 };
 193         };
 194
 195 };
 196 /include/ "fsl/p1020si-post.dtsi"
 197
 198 / {
 199         cpus {
 200                 PowerPC,P1020@0 {
 201                         bus-frequency = <399999996>;
 202                         timebase-frequency = <50000000>;
 203                         clock-frequency = <799999992>;
 204                         d-cache-block-size = <0x20>;
 205                         d-cache-size = <0x8000>;
 206                         d-cache-sets = <0x80>;
 207                         i-cache-block-size = <0x20>;
 208                         i-cache-size = <0x8000>;
 209                         i-cache-sets = <0x80>;
 210                         cpu-release-addr = <0x0 0x0ffff280>;
 211                         status = "okay";
 212                         enable-method = "spin-table";
 213                 };
 214
 215                 PowerPC,P1020@1 {
 216                         bus-frequency = <399999996>;
 217                         timebase-frequency = <50000000>;
 218                         clock-frequency = <799999992>;
 219                         d-cache-block-size = <0x20>;
 220                         d-cache-size = <0x8000>;
 221                         d-cache-sets = <0x80>;
 222                         i-cache-block-size = <0x20>;
 223                         i-cache-size = <0x8000>;
 224                         i-cache-sets = <0x80>;
 225                         cpu-release-addr = <0x0 0x0ffff2a0>;
 226                         status = "disabled";
 227                         enable-method = "spin-table";
 228                 };
 229         };
 230
 231         memory {
 232                 reg = <0x0 0x0 0x0 0x10000000>;
 233         };
 234
 235         reserved-memory {
 236                 #address-cells = <2>;
 237                 #size-cells = <2>;
 238                 ranges;
 239
 240                 cpu1-bootpage@ff00000 {
 241                         /* Reserve upper 1 MB for second-core-bootpage */
 242                         reg = <0x0 0xff00000 0x0 0x100000>;
 243                 };
 244         };
 245
 246         soc@ffe00000 {
 247                 bus-frequency = <399999996>;
 248
 249                 serial@4600 {
 250                         clock-frequency = <399999996>;
 251                 };
 252
 253                 serial@4500 {
 254                         clock-frequency = <399999996>;
 255                 };
 256
 257                 pic@40000 {
 258                         clock-frequency = <399999996>;
 259                 };
 260         };
 261
 262         localbus@ffe05000 {
 263                 bus-frequency = <24999999>;
 264         };
 265 };
 266
 267 &enet0 {
 268         rx-stash-idx = <0x00>;
 269         rx-stash-len = <0x60>;
 270         bd-stash;
 271 };
 272
 273 &enet2 {
 274         rx-stash-idx = <0x00>;
 275         rx-stash-len = <0x60>;
 276         bd-stash;
 277 };
 278
 279 /*
 280  * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
 281  * aliases to determine PCI domain numbers, drop aliases so as not to
 282  * change the sysfs path of our wireless netdevs.
 283  */
 284
 285 / {
 286         aliases {
 287                 /delete-property/ pci0;
 288                 /delete-property/ pci1;
 289         };
 290 };