target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "mt7981.dtsi"
   6
   7 / {
   8         model = "Zbtlink ZBT-Z8102AX";
   9         compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981";
  10
  11         aliases {
  12                 serial0 = &uart0;
  13                 led-boot = &led_status_green;
  14                 led-failsafe = &led_status_red;
  15                 led-running = &led_status_green;
  16                 led-upgrade = &led_status_green;
  17                 label-mac-device = &gmac0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
  23         };
  24
  25         memory {
  26                 reg = <0 0x40000000 0 0x40000000>;
  27         };
  28
  29         gpio-keys {
  30                 compatible = "gpio-keys";
  31
  32                 button-reset {
  33                         label = "reset";
  34                         linux,code = <KEY_RESTART>;
  35                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 button-mesh {
  39                         label = "mesh";
  40                         linux,code = <BTN_0>;
  41                         gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  42                 };
  43
  44                 button-hub {
  45                         label = "hub";
  46                         linux,code = <BTN_1>;
  47                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 led_status_red: red {
  55                         label = "red:status";
  56                         gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
  57                         color = <LED_COLOR_ID_RED>;
  58                         function = LED_FUNCTION_STATUS;
  59                 };
  60
  61                 led_status_green: green {
  62                         label = "green:status";
  63                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  64                         color = <LED_COLOR_ID_GREEN>;
  65                         function = LED_FUNCTION_STATUS;
  66                 };
  67
  68                 blue {
  69                         label = "blue:status";
  70                         gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  71                         color = <LED_COLOR_ID_BLUE>;
  72                         function = LED_FUNCTION_STATUS;
  73                 };
  74
  75                 4g {
  76                         label = "blue:4g";
  77                         gpios = <&pio 8 GPIO_ACTIVE_LOW>;
  78                         color = <LED_COLOR_ID_BLUE>;
  79                         function = LED_FUNCTION_USB;
  80                         function-enumerator = <0>;
  81                 };
  82
  83                 4g2 {
  84                         label = "blue:4g2";
  85                         gpios = <&pio 14 GPIO_ACTIVE_LOW>;
  86                         color = <LED_COLOR_ID_BLUE>;
  87                         function = LED_FUNCTION_USB;
  88                         function-enumerator = <1>;
  89                 };
  90         };
  91
  92         watchdog {
  93                 compatible = "linux,wdt-gpio";
  94                 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
  95                 hw_algo = "toggle";
  96                 hw_margin_ms = <1000>;
  97         };
  98
  99         gpio-export {
 100                 compatible = "gpio-export";
 101                 #size-cells = <0>;
 102
 103                 pcie {
 104                         gpio-export,name = "pcie_power";
 105                         gpio-export,output = <1>;
 106                         gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
 107                 };
 108
 109                 5g1 {
 110                         gpio-export,name = "5g1";
 111                         gpio-export,output = <1>;
 112                         gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
 113                 };
 114
 115                 5g2 {
 116                         gpio-export,name = "5g2";
 117                         gpio-export,output = <1>;
 118                         gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 119                 };
 120
 121                 sim1 {
 122                         gpio-export,name = "sim1";
 123                         gpio-export,output = <1>;
 124                         gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
 125                 };
 126
 127                 sim2 {
 128                         gpio-export,name = "sim2";
 129                         gpio-export,output = <1>;
 130                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
 131                 };
 132         };
 133 };
 134
 135 &eth {
 136         status = "okay";
 137
 138         gmac0: mac@0 {
 139                 /* LAN */
 140                 compatible = "mediatek,eth-mac";
 141                 reg = <0>;
 142                 phy-mode = "2500base-x";
 143                 phy-handle = <&phy0>;
 144
 145                 nvmem-cell-names = "mac-address";
 146                 nvmem-cells = <&macaddr_factory_4 2>;
 147
 148                 fixed-link {
 149                         speed = <2500>;
 150                         full-duplex;
 151                         pause;
 152                 };
 153         };
 154
 155         gmac1: mac@1 {
 156                 /* WAN */
 157                 compatible = "mediatek,eth-mac";
 158                 reg = <1>;
 159                 phy-mode = "gmii";
 160                 phy-handle = <&int_gbe_phy>;
 161
 162                 nvmem-cell-names = "mac-address";
 163                 nvmem-cells = <&macaddr_factory_4 3>;
 164         };
 165 };
 166
 167 &mdio_bus {
 168         switch: switch@1f {
 169                 compatible = "mediatek,mt7531";
 170                 reg = <0x1f>;
 171                 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
 172                 interrupt-controller;
 173                 #interrupt-cells = <1>;
 174                 interrupt-parent = <&pio>;
 175                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 176         };
 177 };
 178
 179 &spi0 {
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&spi0_flash_pins>;
 182         status = "okay";
 183
 184         spi_nand@0 {
 185                 compatible = "spi-nand";
 186                 #address-cells = <1>;
 187                 #size-cells = <1>;
 188                 reg = <0>;
 189
 190                 spi-max-frequency = <52000000>;
 191                 spi-tx-bus-width = <4>;
 192                 spi-rx-bus-width = <4>;
 193
 194                 mediatek,nmbm;
 195                 mediatek,bmt-max-ratio = <1>;
 196                 mediatek,bmt-max-reserved-blocks = <64>;
 197
 198                 partitions {
 199                         compatible = "fixed-partitions";
 200                         #address-cells = <1>;
 201                         #size-cells = <1>;
 202
 203                         partition@0 {
 204                                 label = "bl2";
 205                                 reg = <0x0000000 0x0100000>;
 206                                 read-only;
 207                         };
 208
 209                         partition@100000 {
 210                                 label = "u-boot-env";
 211                                 reg = <0x100000 0x80000>;
 212                         };
 213
 214                         partition@180000 {
 215                                 label = "Factory";
 216                                 reg = <0x180000 0x200000>;
 217                                 read-only;
 218
 219                                 nvmem-layout {
 220                                         compatible = "fixed-layout";
 221                                         #address-cells = <1>;
 222                                         #size-cells = <1>;
 223
 224                                         eeprom_factory: eeprom@0 {
 225                                                 reg = <0x0 0x1000>;
 226                                         };
 227
 228                                         macaddr_factory_4: macaddr@4 {
 229                                                 compatible = "mac-base";
 230                                                 reg = <0x4 0x6>;
 231                                                 #nvmem-cell-cells = <1>;
 232                                         };
 233                                 };
 234                         };
 235
 236                         partition@380000 {
 237                                 label = "FIP";
 238                                 reg = <0x380000 0x200000>;
 239                                 read-only;
 240                         };
 241
 242                         partition@580000 {
 243                                 label = "ubi";
 244                                 reg = <0x580000 0x4000000>;
 245                         };
 246                 };
 247         };
 248 };
 249
 250 &switch {
 251         ports {
 252                 #address-cells = <1>;
 253                 #size-cells = <0>;
 254
 255                 port@0 {
 256                         reg = <0>;
 257                         label = "lan1";
 258                 };
 259
 260                 port@1 {
 261                         reg = <1>;
 262                         label = "lan2";
 263                 };
 264
 265                 port@2 {
 266                         reg = <2>;
 267                         label = "lan3";
 268                 };
 269
 270                 port@3 {
 271                         reg = <3>;
 272                         label = "lan4";
 273                 };
 274
 275                 port@6 {
 276                         reg = <6>;
 277                         label = "cpu";
 278                         ethernet = <&gmac0>;
 279                         phy-mode = "2500base-x";
 280
 281                         fixed-link {
 282                                 speed = <2500>;
 283                                 full-duplex;
 284                                 pause;
 285                         };
 286                 };
 287         };
 288 };
 289
 290 &pio {
 291         spi0_flash_pins: spi0-pins {
 292                 mux {
 293                         function = "spi";
 294                         groups = "spi0", "spi0_wp_hold";
 295                 };
 296
 297                 conf-pu {
 298                         pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 299                         drive-strength = <8>;
 300                         bias-pull-up = <103>;
 301                 };
 302
 303                 conf-pd {
 304                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 305                         drive-strength = <8>;
 306                         bias-pull-down = <103>;
 307                 };
 308         };
 309 };
 310
 311 &uart0 {
 312         status = "okay";
 313 };
 314
 315 &watchdog {
 316         status = "okay";
 317 };
 318
 319 &usb_phy {
 320         status = "okay";
 321 };
 322
 323 &xhci {
 324         status = "okay";
 325 };
 326
 327 &wifi {
 328         status = "okay";
 329
 330         nvmem-cells = <&eeprom_factory>;
 331         nvmem-cell-names = "eeprom";
 332 };