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[openwrt/staging/mans0n.git] / target / linux / layerscape / patches-5.15 / 302-arm64-dts-ls1012a-update-with-ppfe-support.patch
1 From 1bb35ff4ce33e65601c8d9c736be52e4aabd6252 Mon Sep 17 00:00:00 2001
2 From: Calvin Johnson <calvin.johnson@nxp.com>
3 Date: Sat, 16 Sep 2017 14:20:23 +0530
4 Subject: [PATCH] arm64: dts: freescale: ls1012a: update with ppfe support
5
6 Update ls1012a dtsi and platform dts files with support for ppfe.
7
8 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
9 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
10 ---
11 .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 43 +++++++++++++++++
12 .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 43 +++++++++++++++++
13 .../boot/dts/freescale/fsl-ls1012a-qds.dts | 43 +++++++++++++++++
14 .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 47 +++++++++++++++++++
15 .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 29 ++++++++++++
16 5 files changed, 205 insertions(+)
17
18 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
19 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
20 @@ -14,6 +14,11 @@
21 model = "LS1012A Freedom Board";
22 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
23
24 + aliases {
25 + ethernet0 = &pfe_mac0;
26 + ethernet1 = &pfe_mac1;
27 + };
28 +
29 sys_mclk: clock-mclk {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 @@ -95,6 +100,44 @@
33 };
34 };
35
36 +&pfe {
37 + status = "okay";
38 + #address-cells = <1>;
39 + #size-cells = <0>;
40 +
41 + pfe_mac0: ethernet@0 {
42 + compatible = "fsl,pfe-gemac-port";
43 + #address-cells = <1>;
44 + #size-cells = <0>;
45 + reg = <0x0>; /* GEM_ID */
46 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
47 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
48 + fsl,mdio-mux-val = <0x0>;
49 + phy-mode = "sgmii";
50 + fsl,pfe-phy-if-flags = <0x0>;
51 +
52 + mdio@0 {
53 + reg = <0x1>; /* enabled/disabled */
54 + };
55 + };
56 +
57 + pfe_mac1: ethernet@1 {
58 + compatible = "fsl,pfe-gemac-port";
59 + #address-cells = <1>;
60 + #size-cells = <0>;
61 + reg = <0x1>; /* GEM_ID */
62 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
63 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
64 + fsl,mdio-mux-val = <0x0>;
65 + phy-mode = "sgmii";
66 + fsl,pfe-phy-if-flags = <0x0>;
67 +
68 + mdio@0 {
69 + reg = <0x0>; /* enabled/disabled */
70 + };
71 + };
72 +};
73 +
74 &qspi {
75 status = "okay";
76
77 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
78 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
79 @@ -14,6 +14,11 @@
80 / {
81 model = "LS1012A FRWY Board";
82 compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
83 +
84 + aliases {
85 + ethernet0 = &pfe_mac0;
86 + ethernet1 = &pfe_mac1;
87 + };
88 };
89
90 &duart0 {
91 @@ -28,6 +33,44 @@
92 status = "okay";
93 };
94
95 +&pfe {
96 + status = "okay";
97 + #address-cells = <1>;
98 + #size-cells = <0>;
99 +
100 + pfe_mac0: ethernet@0 {
101 + compatible = "fsl,pfe-gemac-port";
102 + #address-cells = <1>;
103 + #size-cells = <0>;
104 + reg = <0x0>; /* GEM_ID */
105 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
106 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
107 + fsl,mdio-mux-val = <0x0>;
108 + phy-mode = "sgmii";
109 + fsl,pfe-phy-if-flags = <0x0>;
110 +
111 + mdio@0 {
112 + reg = <0x1>; /* enabled/disabled */
113 + };
114 + };
115 +
116 + pfe_mac1: ethernet@1 {
117 + compatible = "fsl,pfe-gemac-port";
118 + #address-cells = <1>;
119 + #size-cells = <0>;
120 + reg = <0x1>; /* GEM_ID */
121 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
122 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
123 + fsl,mdio-mux-val = <0x0>;
124 + phy-mode = "sgmii";
125 + fsl,pfe-phy-if-flags = <0x0>;
126 +
127 + mdio@0 {
128 + reg = <0x0>; /* enabled/disabled */
129 + };
130 + };
131 +};
132 +
133 &qspi {
134 status = "okay";
135
136 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
137 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
138 @@ -18,6 +18,11 @@
139 mmc1 = &esdhc1;
140 };
141
142 + aliases {
143 + ethernet0 = &pfe_mac0;
144 + ethernet1 = &pfe_mac1;
145 + };
146 +
147 sys_mclk: clock-mclk {
148 compatible = "fixed-clock";
149 #clock-cells = <0>;
150 @@ -132,6 +137,44 @@
151 };
152 };
153 };
154 +
155 +&pfe {
156 + status = "okay";
157 + #address-cells = <1>;
158 + #size-cells = <0>;
159 +
160 + pfe_mac0: ethernet@0 {
161 + compatible = "fsl,pfe-gemac-port";
162 + #address-cells = <1>;
163 + #size-cells = <0>;
164 + reg = <0x0>; /* GEM_ID */
165 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
166 + fsl,gemac-phy-id = <0x1>; /* PHY_ID */
167 + fsl,mdio-mux-val = <0x2>;
168 + phy-mode = "sgmii-2500";
169 + fsl,pfe-phy-if-flags = <0x0>;
170 +
171 + mdio@0 {
172 + reg = <0x1>; /* enabled/disabled */
173 + };
174 + };
175 +
176 + pfe_mac1: ethernet@1 {
177 + compatible = "fsl,pfe-gemac-port";
178 + #address-cells = <1>;
179 + #size-cells = <0>;
180 + reg = <0x1>; /* GEM_ID */
181 + fsl,gemac-bus-id = <0x1>; /* BUS_ID */
182 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
183 + fsl,mdio-mux-val = <0x3>;
184 + phy-mode = "sgmii-2500";
185 + fsl,pfe-phy-if-flags = <0x0>;
186 +
187 + mdio@0 {
188 + reg = <0x0>; /* enabled/disabled */
189 + };
190 + };
191 +};
192
193 &qspi {
194 status = "okay";
195 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
196 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
197 @@ -16,6 +16,8 @@
198
199 aliases {
200 serial0 = &duart0;
201 + ethernet0 = &pfe_mac0;
202 + ethernet1 = &pfe_mac1;
203 mmc0 = &esdhc0;
204 mmc1 = &esdhc1;
205 };
206 @@ -86,6 +88,44 @@
207 };
208 };
209
210 +&pfe {
211 + status = "okay";
212 + #address-cells = <1>;
213 + #size-cells = <0>;
214 +
215 + pfe_mac0: ethernet@0 {
216 + compatible = "fsl,pfe-gemac-port";
217 + #address-cells = <1>;
218 + #size-cells = <0>;
219 + reg = <0x0>; /* GEM_ID */
220 + fsl,gemac-bus-id = <0x0>; /* BUS_ID */
221 + fsl,gemac-phy-id = <0x2>; /* PHY_ID */
222 + fsl,mdio-mux-val = <0x0>;
223 + phy-mode = "sgmii";
224 + fsl,pfe-phy-if-flags = <0x0>;
225 +
226 + mdio@0 {
227 + reg = <0x1>; /* enabled/disabled */
228 + };
229 + };
230 +
231 + pfe_mac1: ethernet@1 {
232 + compatible = "fsl,pfe-gemac-port";
233 + #address-cells = <1>;
234 + #size-cells = <0>;
235 + reg = <0x1>; /* GEM_ID */
236 + fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
237 + fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
238 + fsl,mdio-mux-val = <0x0>;
239 + phy-mode = "rgmii-txid";
240 + fsl,pfe-phy-if-flags = <0x0>;
241 +
242 + mdio@0 {
243 + reg = <0x0>; /* enabled/disabled */
244 + };
245 + };
246 +};
247 +
248 &qspi {
249 status = "okay";
250
251 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
252 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
253 @@ -560,6 +560,35 @@
254 };
255 };
256
257 + reserved-memory {
258 + #address-cells = <2>;
259 + #size-cells = <2>;
260 + ranges;
261 +
262 + pfe_reserved: packetbuffer@83400000 {
263 + reg = <0 0x83400000 0 0xc00000>;
264 + };
265 + };
266 +
267 + pfe: pfe@04000000 {
268 + compatible = "fsl,pfe";
269 + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
270 + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
271 + reg-names = "pfe", "pfe-ddr";
272 + fsl,pfe-num-interfaces = <0x2>;
273 + interrupts = <0 172 0x4>, /* HIF interrupt */
274 + <0 173 0x4>, /*HIF_NOCPY interrupt */
275 + <0 174 0x4>; /* WoL interrupt */
276 + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
277 + memory-region = <&pfe_reserved>;
278 + fsl,pfe-scfg = <&scfg 0>;
279 + fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
280 + clocks = <&clockgen 4 0>;
281 + clock-names = "pfe";
282 +
283 + status = "okay";
284 + };
285 +
286 firmware {
287 optee {
288 compatible = "linaro,optee-tz";
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