target/linux/ipq806x/patches-5.10/104-4-drivers-thermal-tsens-Use-init_common-for-msm8960.patch

   1 From c04f98a496929f75d75c65115d5717423c3d0634 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Wed, 25 Nov 2020 17:16:36 +0100
   4 Subject: [PATCH 04/10] drivers: thermal: tsens: Use init_common for msm8960
   5
   6 Use init_common and drop custom init for msm8960.
   7
   8 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
   9 Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
  10 ---
  11  drivers/thermal/qcom/tsens-8960.c | 52 +------------------------------
  12  1 file changed, 1 insertion(+), 51 deletions(-)
  13
  14 diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c
  15 index 3f4fc1ffe679..86585f439985 100644
  16 --- a/drivers/thermal/qcom/tsens-8960.c
  17 +++ b/drivers/thermal/qcom/tsens-8960.c
  18 @@ -173,56 +173,6 @@ static void disable_8960(struct tsens_priv *priv)
  19         regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
  20  }
  21
  22 -static int init_8960(struct tsens_priv *priv)
  23 -{
  24 -       int ret, i;
  25 -       u32 reg_cntl;
  26 -
  27 -       priv->tm_map = dev_get_regmap(priv->dev, NULL);
  28 -       if (!priv->tm_map)
  29 -               return -ENODEV;
  30 -
  31 -       /*
  32 -        * The status registers for each sensor are discontiguous
  33 -        * because some SoCs have 5 sensors while others have more
  34 -        * but the control registers stay in the same place, i.e
  35 -        * directly after the first 5 status registers.
  36 -        */
  37 -       for (i = 0; i < priv->num_sensors; i++) {
  38 -               if (i >= 5)
  39 -                       priv->sensor[i].status = S0_STATUS_ADDR + 40;
  40 -               priv->sensor[i].status += i * 4;
  41 -       }
  42 -
  43 -       reg_cntl = SW_RST;
  44 -       ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
  45 -       if (ret)
  46 -               return ret;
  47 -
  48 -       if (priv->num_sensors > 1) {
  49 -               reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
  50 -               reg_cntl &= ~SW_RST;
  51 -               ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
  52 -                                        CONFIG_MASK, CONFIG);
  53 -       } else {
  54 -               reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
  55 -               reg_cntl &= ~CONFIG_MASK_8660;
  56 -               reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
  57 -       }
  58 -
  59 -       reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
  60 -       ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
  61 -       if (ret)
  62 -               return ret;
  63 -
  64 -       reg_cntl |= EN;
  65 -       ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
  66 -       if (ret)
  67 -               return ret;
  68 -
  69 -       return 0;
  70 -}
  71 -
  72  static int calibrate_8960(struct tsens_priv *priv)
  73  {
  74         int i;
  75 @@ -346,7 +296,7 @@ static const struct reg_field tsens_8960_regfields[MAX_REGFIELDS] = {
  76  };
  77
  78  static const struct tsens_ops ops_8960 = {
  79 -       .init           = init_8960,
  80 +       .init           = init_common,
  81         .calibrate      = calibrate_8960,
  82         .get_temp       = get_temp_8960,
  83         .enable         = enable_8960,
  84 --
  85 2.30.2
  86