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kernel: add bcma/ssb fallback SPROM support
[openwrt/staging/dedeckeh.git] / target / linux / generic / files / drivers / ssb / fallback-sprom.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * SSB Fallback SPROM Driver
4 *
5 * Copyright (C) 2020 Álvaro Fernández Rojas <noltari@gmail.com>
6 * Copyright (C) 2014 Jonas Gorski <jonas.gorski@gmail.com>
7 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
8 * Copyright (C) 2008 Florian Fainelli <f.fainelli@gmail.com>
9 */
10
11 #include <linux/etherdevice.h>
12 #include <linux/firmware.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/of_net.h>
17 #include <linux/of_platform.h>
18 #include <linux/ssb/ssb.h>
19
20 #define SSB_FBS_MAX_SIZE 440
21
22 /* Get the word-offset for a SSB_SPROM_XXX define. */
23 #define SPOFF(offset) ((offset) / sizeof(u16))
24 /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
25 #define SPEX16(_outvar, _offset, _mask, _shift) \
26 out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
27 #define SPEX32(_outvar, _offset, _mask, _shift) \
28 out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
29 in[SPOFF(_offset)]) & (_mask)) >> (_shift))
30 #define SPEX(_outvar, _offset, _mask, _shift) \
31 SPEX16(_outvar, _offset, _mask, _shift)
32
33 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
34 do { \
35 SPEX(_field[0], _offset + 0, _mask, _shift); \
36 SPEX(_field[1], _offset + 2, _mask, _shift); \
37 SPEX(_field[2], _offset + 4, _mask, _shift); \
38 SPEX(_field[3], _offset + 6, _mask, _shift); \
39 SPEX(_field[4], _offset + 8, _mask, _shift); \
40 SPEX(_field[5], _offset + 10, _mask, _shift); \
41 SPEX(_field[6], _offset + 12, _mask, _shift); \
42 SPEX(_field[7], _offset + 14, _mask, _shift); \
43 } while (0)
44
45 struct ssb_fbs {
46 struct device *dev;
47 struct list_head list;
48 struct ssb_sprom sprom;
49 u32 pci_bus;
50 u32 pci_dev;
51 u8 mac[ETH_ALEN];
52 int devid_override;
53 };
54
55 static DEFINE_SPINLOCK(ssb_fbs_lock);
56 static struct list_head ssb_fbs_list = LIST_HEAD_INIT(ssb_fbs_list);
57
58 int ssb_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
59 {
60 const u32 pci_bus = bus->host_pci->bus->number;
61 const u32 pci_dev = PCI_SLOT(bus->host_pci->devfn);
62 struct ssb_fbs *pos;
63
64 list_for_each_entry(pos, &ssb_fbs_list, list) {
65 if (pos->pci_bus != pci_bus ||
66 pos->pci_dev != pci_dev)
67 continue;
68
69 if (pos->devid_override)
70 bus->host_pci->device = pos->sprom.dev_id;
71
72 memcpy(out, &pos->sprom, sizeof(struct ssb_sprom));
73 dev_info(pos->dev, "requested by [%x:%x]",
74 pos->pci_bus, pos->pci_dev);
75
76 return 0;
77 }
78
79 pr_err("unable to fill SPROM for [%x:%x]\n", pci_bus, pci_dev);
80
81 return -EINVAL;
82 }
83
84 static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
85 u16 mask, u16 shift)
86 {
87 u16 v;
88 u8 gain;
89
90 v = in[SPOFF(offset)];
91 gain = (v & mask) >> shift;
92 if (gain == 0xFF)
93 gain = 2; /* If unset use 2dBm */
94 if (sprom_revision == 1) {
95 /* Convert to Q5.2 */
96 gain <<= 2;
97 } else {
98 /* Q5.2 Fractional part is stored in 0xC0 */
99 gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
100 }
101
102 return (s8)gain;
103 }
104
105 static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
106 {
107 SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
108 SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
109 SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
110 SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
111 SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
112 SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
113 SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
114 SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
115 SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
116 SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
117 SSB_SPROM2_MAXP_A_LO_SHIFT);
118 }
119
120 static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
121 {
122 u16 loc[3];
123
124 if (out->revision == 3) /* rev 3 moved MAC */
125 loc[0] = SSB_SPROM3_IL0MAC;
126 else {
127 loc[0] = SSB_SPROM1_IL0MAC;
128 loc[1] = SSB_SPROM1_ET0MAC;
129 loc[2] = SSB_SPROM1_ET1MAC;
130 }
131
132 SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
133 SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
134 SSB_SPROM1_ETHPHY_ET1A_SHIFT);
135 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
136 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
137 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
138 SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
139 if (out->revision == 1)
140 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
141 SSB_SPROM1_BINF_CCODE_SHIFT);
142 SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
143 SSB_SPROM1_BINF_ANTA_SHIFT);
144 SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
145 SSB_SPROM1_BINF_ANTBG_SHIFT);
146 SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
147 SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
148 SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
149 SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
150 SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
151 SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
152 SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
153 SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
154 SSB_SPROM1_GPIOA_P1_SHIFT);
155 SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
156 SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
157 SSB_SPROM1_GPIOB_P3_SHIFT);
158 SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
159 SSB_SPROM1_MAXPWR_A_SHIFT);
160 SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
161 SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
162 SSB_SPROM1_ITSSI_A_SHIFT);
163 SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
164 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
165
166 SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
167 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
168
169 /* Extract the antenna gain values. */
170 out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
171 SSB_SPROM1_AGAIN,
172 SSB_SPROM1_AGAIN_BG,
173 SSB_SPROM1_AGAIN_BG_SHIFT);
174 out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
175 SSB_SPROM1_AGAIN,
176 SSB_SPROM1_AGAIN_A,
177 SSB_SPROM1_AGAIN_A_SHIFT);
178 if (out->revision >= 2)
179 sprom_extract_r23(out, in);
180 }
181
182 /* Revs 4 5 and 8 have partially shared layout */
183 static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
184 {
185 SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
186 SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
187 SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
188 SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
189 SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
190 SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
191 SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
192 SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
193
194 SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
195 SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
196 SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
197 SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
198 SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
199 SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
200 SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
201 SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
202
203 SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
204 SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
205 SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
206 SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
207 SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
208 SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
209 SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
210 SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
211
212 SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
213 SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
214 SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
215 SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
216 SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
217 SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
218 SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
219 SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
220 }
221
222 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
223 {
224 static const u16 pwr_info_offset[] = {
225 SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
226 SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
227 };
228 int i;
229
230 BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
231 ARRAY_SIZE(out->core_pwr_info));
232
233 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
234 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
235 SSB_SPROM4_ETHPHY_ET1A_SHIFT);
236 SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
237 SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
238 if (out->revision == 4) {
239 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
240 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
241 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
242 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
243 SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
244 SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
245 } else {
246 SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
247 SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
248 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
249 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
250 SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
251 SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
252 }
253 SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
254 SSB_SPROM4_ANTAVAIL_A_SHIFT);
255 SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
256 SSB_SPROM4_ANTAVAIL_BG_SHIFT);
257 SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
258 SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
259 SSB_SPROM4_ITSSI_BG_SHIFT);
260 SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
261 SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
262 SSB_SPROM4_ITSSI_A_SHIFT);
263 if (out->revision == 4) {
264 SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
265 SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
266 SSB_SPROM4_GPIOA_P1_SHIFT);
267 SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
268 SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
269 SSB_SPROM4_GPIOB_P3_SHIFT);
270 } else {
271 SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
272 SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
273 SSB_SPROM5_GPIOA_P1_SHIFT);
274 SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
275 SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
276 SSB_SPROM5_GPIOB_P3_SHIFT);
277 }
278
279 /* Extract the antenna gain values. */
280 out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
281 SSB_SPROM4_AGAIN01,
282 SSB_SPROM4_AGAIN0,
283 SSB_SPROM4_AGAIN0_SHIFT);
284 out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
285 SSB_SPROM4_AGAIN01,
286 SSB_SPROM4_AGAIN1,
287 SSB_SPROM4_AGAIN1_SHIFT);
288 out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
289 SSB_SPROM4_AGAIN23,
290 SSB_SPROM4_AGAIN2,
291 SSB_SPROM4_AGAIN2_SHIFT);
292 out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
293 SSB_SPROM4_AGAIN23,
294 SSB_SPROM4_AGAIN3,
295 SSB_SPROM4_AGAIN3_SHIFT);
296
297 /* Extract cores power info info */
298 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
299 u16 o = pwr_info_offset[i];
300
301 SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
302 SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
303 SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
304 SSB_SPROM4_2G_MAXP, 0);
305
306 SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
307 SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
308 SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
309 SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
310
311 SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
312 SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
313 SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
314 SSB_SPROM4_5G_MAXP, 0);
315 SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
316 SSB_SPROM4_5GH_MAXP, 0);
317 SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
318 SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
319
320 SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
321 SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
322 SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
323 SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
324 SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
325 SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
326 SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
327 SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
328 SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
329 SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
330 SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
331 SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
332 }
333
334 sprom_extract_r458(out, in);
335
336 /* TODO - get remaining rev 4 stuff needed */
337 }
338
339 static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
340 {
341 int i;
342 u16 o;
343 static const u16 pwr_info_offset[] = {
344 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
345 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
346 };
347 BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
348 ARRAY_SIZE(out->core_pwr_info));
349
350 SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
351 SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
352 SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
353 SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
354 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
355 SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
356 SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
357 SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
358 SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
359 SSB_SPROM8_ANTAVAIL_A_SHIFT);
360 SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
361 SSB_SPROM8_ANTAVAIL_BG_SHIFT);
362 SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
363 SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
364 SSB_SPROM8_ITSSI_BG_SHIFT);
365 SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
366 SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
367 SSB_SPROM8_ITSSI_A_SHIFT);
368 SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
369 SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
370 SSB_SPROM8_MAXP_AL_SHIFT);
371 SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
372 SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
373 SSB_SPROM8_GPIOA_P1_SHIFT);
374 SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
375 SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
376 SSB_SPROM8_GPIOB_P3_SHIFT);
377 SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
378 SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
379 SSB_SPROM8_TRI5G_SHIFT);
380 SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
381 SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
382 SSB_SPROM8_TRI5GH_SHIFT);
383 SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
384 SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
385 SSB_SPROM8_RXPO5G_SHIFT);
386 SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
387 SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
388 SSB_SPROM8_RSSISMC2G_SHIFT);
389 SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
390 SSB_SPROM8_RSSISAV2G_SHIFT);
391 SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
392 SSB_SPROM8_BXA2G_SHIFT);
393 SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
394 SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
395 SSB_SPROM8_RSSISMC5G_SHIFT);
396 SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
397 SSB_SPROM8_RSSISAV5G_SHIFT);
398 SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
399 SSB_SPROM8_BXA5G_SHIFT);
400 SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
401 SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
402 SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
403 SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
404 SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
405 SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
406 SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
407 SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
408 SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
409 SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
410 SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
411 SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
412 SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
413 SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
414 SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
415 SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
416 SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
417
418 /* Extract the antenna gain values. */
419 out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
420 SSB_SPROM8_AGAIN01,
421 SSB_SPROM8_AGAIN0,
422 SSB_SPROM8_AGAIN0_SHIFT);
423 out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
424 SSB_SPROM8_AGAIN01,
425 SSB_SPROM8_AGAIN1,
426 SSB_SPROM8_AGAIN1_SHIFT);
427 out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
428 SSB_SPROM8_AGAIN23,
429 SSB_SPROM8_AGAIN2,
430 SSB_SPROM8_AGAIN2_SHIFT);
431 out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
432 SSB_SPROM8_AGAIN23,
433 SSB_SPROM8_AGAIN3,
434 SSB_SPROM8_AGAIN3_SHIFT);
435
436 /* Extract cores power info info */
437 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
438 o = pwr_info_offset[i];
439 SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
440 SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
441 SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
442 SSB_SPROM8_2G_MAXP, 0);
443
444 SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
445 SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
446 SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
447
448 SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
449 SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
450 SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
451 SSB_SPROM8_5G_MAXP, 0);
452 SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
453 SSB_SPROM8_5GH_MAXP, 0);
454 SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
455 SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
456
457 SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
458 SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
459 SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
460 SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
461 SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
462 SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
463 SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
464 SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
465 SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
466 }
467
468 /* Extract FEM info */
469 SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
470 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
471 SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
472 SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
473 SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
474 SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
475 SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
476 SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
477 SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
478 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
479
480 SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
481 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
482 SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
483 SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
484 SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
485 SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
486 SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
487 SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
488 SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
489 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
490
491 SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
492 SSB_SPROM8_LEDDC_ON_SHIFT);
493 SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
494 SSB_SPROM8_LEDDC_OFF_SHIFT);
495
496 SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
497 SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
498 SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
499 SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
500 SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
501 SSB_SPROM8_TXRXC_SWITCH_SHIFT);
502
503 SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
504
505 SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
506 SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
507 SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
508 SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
509
510 SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
511 SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
512 SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
513 SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
514 SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
515 SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
516 SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
517 SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
518 SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
519 SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
520 SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
521 SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
522 SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
523 SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
524 SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
525 SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
526 SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
527 SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
528 SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
529 SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
530
531 SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
532 SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
533 SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
534 SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
535
536 SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
537 SSB_SPROM8_THERMAL_TRESH_SHIFT);
538 SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
539 SSB_SPROM8_THERMAL_OFFSET_SHIFT);
540 SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
541 SSB_SPROM8_TEMPDELTA_PHYCAL,
542 SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
543 SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
544 SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
545 SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
546 SSB_SPROM8_TEMPDELTA_HYSTERESIS,
547 SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
548 sprom_extract_r458(out, in);
549
550 /* TODO - get remaining rev 8 stuff needed */
551 }
552
553 static int sprom_extract(struct ssb_fbs *priv, const u16 *in, u16 size)
554 {
555 struct ssb_sprom *out = &priv->sprom;
556
557 memset(out, 0, sizeof(*out));
558
559 out->revision = in[size - 1] & 0x00FF;
560 memset(out->et0mac, 0xFF, 6);
561 memset(out->et1mac, 0xFF, 6);
562
563 switch (out->revision) {
564 case 1:
565 case 2:
566 case 3:
567 sprom_extract_r123(out, in);
568 break;
569 case 4:
570 case 5:
571 sprom_extract_r45(out, in);
572 break;
573 case 8:
574 sprom_extract_r8(out, in);
575 break;
576 default:
577 dev_warn(priv->dev,
578 "Unsupported SPROM revision %d detected."
579 " Will extract v1\n",
580 out->revision);
581 out->revision = 1;
582 sprom_extract_r123(out, in);
583 }
584
585 if (out->boardflags_lo == 0xFFFF)
586 out->boardflags_lo = 0; /* per specs */
587 if (out->boardflags_hi == 0xFFFF)
588 out->boardflags_hi = 0; /* per specs */
589
590 return 0;
591 }
592
593 static void ssb_fbs_fixup(struct ssb_fbs *priv, u16 *sprom)
594 {
595 struct device_node *node = priv->dev->of_node;
596 u32 fixups, off, val;
597 int i = 0;
598
599 if (!of_get_property(node, "brcm,sprom-fixups", &fixups))
600 return;
601
602 fixups /= sizeof(u32);
603
604 dev_info(priv->dev, "patching SPROM with %u fixups...\n", fixups >> 1);
605
606 while (i < fixups) {
607 if (of_property_read_u32_index(node, "brcm,sprom-fixups",
608 i++, &off)) {
609 dev_err(priv->dev, "error reading fixup[%u] offset\n",
610 i - 1);
611 return;
612 }
613
614 if (of_property_read_u32_index(node, "brcm,sprom-fixups",
615 i++, &val)) {
616 dev_err(priv->dev, "error reading fixup[%u] value\n",
617 i - 1);
618 return;
619 }
620
621 dev_dbg(priv->dev, "fixup[%d]=0x%04x\n", off, val);
622
623 sprom[off] = val;
624 }
625 }
626
627 static int sprom_override_devid(struct ssb_fbs *priv, struct ssb_sprom *out,
628 const u16 *in)
629 {
630 SPEX(dev_id, SSB_SPROM1_PID, 0xFFFF, 0);
631 return !!out->dev_id;
632 }
633
634 static int ssb_fbs_set(struct ssb_fbs *priv, struct device_node *node)
635 {
636 struct ssb_sprom *sprom = &priv->sprom;
637 const struct firmware *fw;
638 const char *sprom_name;
639 int err;
640
641 if (of_property_read_string(node, "brcm,sprom", &sprom_name))
642 sprom_name = NULL;
643
644 if (sprom_name) {
645 err = request_firmware_direct(&fw, sprom_name, priv->dev);
646 if (err)
647 dev_err(priv->dev, "%s load error\n", sprom_name);
648 } else {
649 err = -ENOENT;
650 }
651
652 if (err) {
653 sprom->revision = 0x02;
654 sprom->board_rev = 0x0017;
655 sprom->country_code = 0x00;
656 sprom->ant_available_bg = 0x03;
657 sprom->pa0b0 = 0x15ae;
658 sprom->pa0b1 = 0xfa85;
659 sprom->pa0b2 = 0xfe8d;
660 sprom->pa1b0 = 0xffff;
661 sprom->pa1b1 = 0xffff;
662 sprom->pa1b2 = 0xffff;
663 sprom->gpio0 = 0xff;
664 sprom->gpio1 = 0xff;
665 sprom->gpio2 = 0xff;
666 sprom->gpio3 = 0xff;
667 sprom->maxpwr_bg = 0x4c;
668 sprom->itssi_bg = 0x00;
669 sprom->boardflags_lo = 0x2848;
670 sprom->boardflags_hi = 0x0000;
671 priv->devid_override = 0;
672
673 dev_warn(priv->dev, "using basic SPROM\n");
674 } else {
675 size_t size = min(fw->size, (size_t) SSB_FBS_MAX_SIZE);
676 u16 tmp_sprom[SSB_FBS_MAX_SIZE >> 1];
677 u32 i, j;
678
679 for (i = 0, j = 0; i < size; i += 2, j++)
680 tmp_sprom[j] = (fw->data[i] << 8) | fw->data[i + 1];
681
682 release_firmware(fw);
683 ssb_fbs_fixup(priv, tmp_sprom);
684 sprom_extract(priv, tmp_sprom, size >> 1);
685
686 priv->devid_override = sprom_override_devid(priv, sprom,
687 tmp_sprom);
688 }
689
690 return 0;
691 }
692
693 static int ssb_fbs_probe(struct platform_device *pdev)
694 {
695 struct device *dev = &pdev->dev;
696 struct device_node *node = dev->of_node;
697 struct ssb_fbs *priv;
698 unsigned long flags;
699
700 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
701 if (!priv)
702 return -ENOMEM;
703
704 priv->dev = dev;
705
706 ssb_fbs_set(priv, node);
707
708 of_property_read_u32(node, "pci-bus", &priv->pci_bus);
709 of_property_read_u32(node, "pci-dev", &priv->pci_dev);
710
711 of_get_mac_address(node, priv->mac);
712 if (is_valid_ether_addr(priv->mac)) {
713 dev_info(dev, "mtd mac %pM\n", priv->mac);
714 } else {
715 random_ether_addr(priv->mac);
716 dev_info(dev, "random mac %pM\n", priv->mac);
717 }
718
719 memcpy(priv->sprom.il0mac, priv->mac, ETH_ALEN);
720 memcpy(priv->sprom.et0mac, priv->mac, ETH_ALEN);
721 memcpy(priv->sprom.et1mac, priv->mac, ETH_ALEN);
722 memcpy(priv->sprom.et2mac, priv->mac, ETH_ALEN);
723
724 spin_lock_irqsave(&ssb_fbs_lock, flags);
725 list_add(&priv->list, &ssb_fbs_list);
726 spin_unlock_irqrestore(&ssb_fbs_lock, flags);
727
728 dev_info(dev, "registered SPROM for [%x:%x]\n",
729 priv->pci_bus, priv->pci_dev);
730
731 return 0;
732 }
733
734 static const struct of_device_id ssb_fbs_of_match[] = {
735 { .compatible = "brcm,ssb-sprom", },
736 { /* sentinel */ }
737 };
738 MODULE_DEVICE_TABLE(of, ssb_fbs_of_match);
739
740 static struct platform_driver ssb_fbs_driver = {
741 .probe = ssb_fbs_probe,
742 .driver = {
743 .name = "ssb-sprom",
744 .of_match_table = ssb_fbs_of_match,
745 },
746 };
747
748 int __init ssb_fbs_register(void)
749 {
750 return platform_driver_register(&ssb_fbs_driver);
751 }
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