target/linux/mvebu/patches-5.4/000-v5.5-arm64-dts-marvell-Add-support-for-Marvell-CN9130-SoC.patch

   1 From 6b8970bd8d7a17a648e31f3996d9b21336b4a2cf Mon Sep 17 00:00:00 2001
   2 From: Miquel Raynal <miquel.raynal@bootlin.com>
   3 Date: Fri, 4 Oct 2019 16:27:35 +0200
   4 Subject: [PATCH] arm64: dts: marvell: Add support for Marvell CN9130 SoC
   5  support
   6
   7 A CN9130 SoC has one AP807 and one internal CP115.
   8
   9 Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
  10 Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
  11 ---
  12  arch/arm64/boot/dts/marvell/cn9130.dtsi | 37 +++++++++++++++++++++++++
  13  1 file changed, 37 insertions(+)
  14  create mode 100644 arch/arm64/boot/dts/marvell/cn9130.dtsi
  15
  16 --- /dev/null
  17 +++ b/arch/arm64/boot/dts/marvell/cn9130.dtsi
  18 @@ -0,0 +1,37 @@
  19 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  20 +/*
  21 + * Copyright (C) 2019 Marvell International Ltd.
  22 + *
  23 + * Device tree for the CN9130 SoC.
  24 + */
  25 +
  26 +#include "armada-ap807-quad.dtsi"
  27 +
  28 +/ {
  29 +       model = "Marvell Armada CN9130 SoC";
  30 +       compatible = "marvell,cn9130", "marvell,armada-ap807-quad",
  31 +                    "marvell,armada-ap807";
  32 +};
  33 +
  34 +/*
  35 + * Instantiate the internal CP115
  36 + */
  37 +
  38 +#define CP11X_NAME             cp0
  39 +#define CP11X_BASE             f2000000
  40 +#define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \
  41 +                                                   0xe0000000 + ((iface - 1) * 0x1000000))
  42 +#define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000)
  43 +#define CP11X_PCIE0_BASE       f2600000
  44 +#define CP11X_PCIE1_BASE       f2620000
  45 +#define CP11X_PCIE2_BASE       f2640000
  46 +
  47 +#include "armada-cp115.dtsi"
  48 +
  49 +#undef CP11X_NAME
  50 +#undef CP11X_BASE
  51 +#undef CP11X_PCIEx_MEM_BASE
  52 +#undef CP11X_PCIEx_MEM_SIZE
  53 +#undef CP11X_PCIE0_BASE
  54 +#undef CP11X_PCIE1_BASE
  55 +#undef CP11X_PCIE2_BASE