target/linux/bcm27xx/patches-6.1/950-0855-gpio_brcmstb-Allow-to-build-for-ARCH_BCM2835.patch

   1 From fa18902ee1e53ad391a455a01be3ab2ea1c5af5f Mon Sep 17 00:00:00 2001
   2 From: Dom Cobley <popcornmix@gmail.com>
   3 Date: Fri, 21 May 2021 12:33:38 +0100
   4 Subject: [PATCH] gpio_brcmstb: Allow to build for ARCH_BCM2835
   5
   6 gpio-brcmstb: Report the correct bank width
   7
   8 gpio: brcmstb: Use bank address as gpiochip label
   9
  10 If the path to the device node is used as gpiochip label then
  11 gpio-brcmstb instances with multiple banks end up with duplicated
  12 names. Instead, use a combination of the driver name with the physical
  13 address of the bank, which is both unique and helpful for devmem
  14 debugging.
  15
  16 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  17
  18 gpio: mmio: Add DIRECT mode for shared access
  19
  20 The generic MMIO GPIO library uses shadow registers for efficiency,
  21 but this breaks attempts by raspi-gpio to change other GPIOs in the
  22 same bank. Add a DIRECT mode that makes fewer assumptions about the
  23 existing register contents, but note that genuinely simultaneous
  24 accesses are likely to lose updates.
  25
  26 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  27
  28 gpio: brcmstb: Don't always clear interrupt mask
  29
  30 If the GPIO controller is not being used as an interrupt source
  31 leave the interrupt mask register alone. On BCM2712 it might be used
  32 to generate interrupts to the VPU firmware, and on other devices it
  33 doesn't matter since no interrupts will be generated.
  34
  35 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  36 ---
  37  drivers/gpio/Kconfig        |   2 +-
  38  drivers/gpio/gpio-brcmstb.c |  14 ++--
  39  drivers/gpio/gpio-mmio.c    | 124 ++++++++++++++++++++++++++++++++++--
  40  include/linux/gpio/driver.h |   1 +
  41  4 files changed, 131 insertions(+), 10 deletions(-)
  42
  43 --- a/drivers/gpio/Kconfig
  44 +++ b/drivers/gpio/Kconfig
  45 @@ -203,7 +203,7 @@ config GPIO_BCM_VIRT
  46  config GPIO_BRCMSTB
  47         tristate "BRCMSTB GPIO support"
  48         default y if (ARCH_BRCMSTB || BMIPS_GENERIC)
  49 -       depends on OF_GPIO && (ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST)
  50 +       depends on OF_GPIO && (ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM2835 || COMPILE_TEST)
  51         select GPIO_GENERIC
  52         select IRQ_DOMAIN
  53         help
  54 --- a/drivers/gpio/gpio-brcmstb.c
  55 +++ b/drivers/gpio/gpio-brcmstb.c
  56 @@ -640,6 +640,8 @@ static int brcmstb_gpio_probe(struct pla
  57  #if defined(CONFIG_MIPS) && defined(__BIG_ENDIAN)
  58         flags = BGPIOF_BIG_ENDIAN_BYTE_ORDER;
  59  #endif
  60 +       if (of_property_read_bool(np, "brcm,gpio-direct"))
  61 +           flags |= BGPIOF_REG_DIRECT;
  62
  63         of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p,
  64                         bank_width) {
  65 @@ -689,7 +691,9 @@ static int brcmstb_gpio_probe(struct pla
  66                 }
  67
  68                 gc->owner = THIS_MODULE;
  69 -               gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np);
  70 +               gc->label = devm_kasprintf(dev, GFP_KERNEL, "gpio-brcmstb@%zx",
  71 +                                          (size_t)res->start +
  72 +                                          GIO_BANK_OFF(bank->id, 0));
  73                 if (!gc->label) {
  74                         err = -ENOMEM;
  75                         goto fail;
  76 @@ -698,7 +702,7 @@ static int brcmstb_gpio_probe(struct pla
  77                 gc->of_gpio_n_cells = 2;
  78                 gc->of_xlate = brcmstb_gpio_of_xlate;
  79                 /* not all ngpio lines are valid, will use bank width later */
  80 -               gc->ngpio = MAX_GPIO_PER_BANK;
  81 +               gc->ngpio = bank_width;
  82                 gc->offset = bank->id * MAX_GPIO_PER_BANK;
  83                 if (priv->parent_irq > 0)
  84                         gc->to_irq = brcmstb_gpio_to_irq;
  85 @@ -707,8 +711,10 @@ static int brcmstb_gpio_probe(struct pla
  86                  * Mask all interrupts by default, since wakeup interrupts may
  87                  * be retained from S5 cold boot
  88                  */
  89 -               need_wakeup_event |= !!__brcmstb_gpio_get_active_irqs(bank);
  90 -               gc->write_reg(reg_base + GIO_MASK(bank->id), 0);
  91 +               if (priv->parent_irq > 0) {
  92 +                       need_wakeup_event |= !!__brcmstb_gpio_get_active_irqs(bank);
  93 +                       gc->write_reg(reg_base + GIO_MASK(bank->id), 0);
  94 +               }
  95
  96                 err = gpiochip_add_data(gc, bank);
  97                 if (err) {
  98 --- a/drivers/gpio/gpio-mmio.c
  99 +++ b/drivers/gpio/gpio-mmio.c
 100 @@ -232,6 +232,25 @@ static void bgpio_set(struct gpio_chip *
 101         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 102  }
 103
 104 +static void bgpio_set_direct(struct gpio_chip *gc, unsigned int gpio, int val)
 105 +{
 106 +       unsigned long mask = bgpio_line2mask(gc, gpio);
 107 +       unsigned long flags;
 108 +
 109 +       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 110 +
 111 +       gc->bgpio_data = gc->read_reg(gc->reg_dat);
 112 +
 113 +       if (val)
 114 +               gc->bgpio_data |= mask;
 115 +       else
 116 +               gc->bgpio_data &= ~mask;
 117 +
 118 +       gc->write_reg(gc->reg_dat, gc->bgpio_data);
 119 +
 120 +       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 121 +}
 122 +
 123  static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
 124                                  int val)
 125  {
 126 @@ -324,6 +343,27 @@ static void bgpio_set_multiple_with_clea
 127                 gc->write_reg(gc->reg_clr, clear_mask);
 128  }
 129
 130 +static void bgpio_set_multiple_direct(struct gpio_chip *gc,
 131 +                                     unsigned long *mask,
 132 +                                     unsigned long *bits)
 133 +{
 134 +       unsigned long flags;
 135 +       unsigned long set_mask, clear_mask;
 136 +
 137 +       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 138 +
 139 +       bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
 140 +
 141 +       gc->bgpio_data = gc->read_reg(gc->reg_dat);
 142 +
 143 +       gc->bgpio_data |= set_mask;
 144 +       gc->bgpio_data &= ~clear_mask;
 145 +
 146 +       gc->write_reg(gc->reg_dat, gc->bgpio_data);
 147 +
 148 +       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 149 +}
 150 +
 151  static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
 152  {
 153         return 0;
 154 @@ -361,6 +401,29 @@ static int bgpio_dir_in(struct gpio_chip
 155         return 0;
 156  }
 157
 158 +static int bgpio_dir_in_direct(struct gpio_chip *gc, unsigned int gpio)
 159 +{
 160 +       unsigned long flags;
 161 +
 162 +       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 163 +
 164 +       if (gc->reg_dir_in)
 165 +               gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
 166 +       if (gc->reg_dir_out)
 167 +               gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
 168 +
 169 +       gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
 170 +
 171 +       if (gc->reg_dir_in)
 172 +               gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
 173 +       if (gc->reg_dir_out)
 174 +               gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
 175 +
 176 +       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 177 +
 178 +       return 0;
 179 +}
 180 +
 181  static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
 182  {
 183         /* Return 0 if output, 1 if input */
 184 @@ -399,6 +462,28 @@ static void bgpio_dir_out(struct gpio_ch
 185         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 186  }
 187
 188 +static void bgpio_dir_out_direct(struct gpio_chip *gc, unsigned int gpio,
 189 +                                int val)
 190 +{
 191 +       unsigned long flags;
 192 +
 193 +       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
 194 +
 195 +       if (gc->reg_dir_in)
 196 +               gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
 197 +       if (gc->reg_dir_out)
 198 +               gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
 199 +
 200 +       gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
 201 +
 202 +       if (gc->reg_dir_in)
 203 +               gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
 204 +       if (gc->reg_dir_out)
 205 +               gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
 206 +
 207 +       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 208 +}
 209 +
 210  static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,
 211                                    int val)
 212  {
 213 @@ -415,6 +500,22 @@ static int bgpio_dir_out_val_first(struc
 214         return 0;
 215  }
 216
 217 +static int bgpio_dir_out_dir_first_direct(struct gpio_chip *gc,
 218 +                                         unsigned int gpio, int val)
 219 +{
 220 +       bgpio_dir_out_direct(gc, gpio, val);
 221 +       gc->set(gc, gpio, val);
 222 +       return 0;
 223 +}
 224 +
 225 +static int bgpio_dir_out_val_first_direct(struct gpio_chip *gc,
 226 +                                         unsigned int gpio, int val)
 227 +{
 228 +       gc->set(gc, gpio, val);
 229 +       bgpio_dir_out_direct(gc, gpio, val);
 230 +       return 0;
 231 +}
 232 +
 233  static int bgpio_setup_accessors(struct device *dev,
 234                                  struct gpio_chip *gc,
 235                                  bool byte_be)
 236 @@ -508,6 +609,9 @@ static int bgpio_setup_io(struct gpio_ch
 237         } else if (flags & BGPIOF_NO_OUTPUT) {
 238                 gc->set = bgpio_set_none;
 239                 gc->set_multiple = NULL;
 240 +       } else if (flags & BGPIOF_REG_DIRECT) {
 241 +               gc->set = bgpio_set_direct;
 242 +               gc->set_multiple = bgpio_set_multiple_direct;
 243         } else {
 244                 gc->set = bgpio_set;
 245                 gc->set_multiple = bgpio_set_multiple;
 246 @@ -544,11 +648,21 @@ static int bgpio_setup_direction(struct
 247         if (dirout || dirin) {
 248                 gc->reg_dir_out = dirout;
 249                 gc->reg_dir_in = dirin;
 250 -               if (flags & BGPIOF_NO_SET_ON_INPUT)
 251 -                       gc->direction_output = bgpio_dir_out_dir_first;
 252 -               else
 253 -                       gc->direction_output = bgpio_dir_out_val_first;
 254 -               gc->direction_input = bgpio_dir_in;
 255 +               if (flags & BGPIOF_REG_DIRECT) {
 256 +                       if (flags & BGPIOF_NO_SET_ON_INPUT)
 257 +                               gc->direction_output =
 258 +                                       bgpio_dir_out_dir_first_direct;
 259 +                       else
 260 +                               gc->direction_output =
 261 +                                       bgpio_dir_out_val_first_direct;
 262 +                       gc->direction_input = bgpio_dir_in_direct;
 263 +               } else {
 264 +                       if (flags & BGPIOF_NO_SET_ON_INPUT)
 265 +                               gc->direction_output = bgpio_dir_out_dir_first;
 266 +                       else
 267 +                               gc->direction_output = bgpio_dir_out_val_first;
 268 +                       gc->direction_input = bgpio_dir_in;
 269 +               }
 270                 gc->get_direction = bgpio_get_dir;
 271         } else {
 272                 if (flags & BGPIOF_NO_OUTPUT)
 273 --- a/include/linux/gpio/driver.h
 274 +++ b/include/linux/gpio/driver.h
 275 @@ -690,6 +690,7 @@ int bgpio_init(struct gpio_chip *gc, str
 276  #define BGPIOF_READ_OUTPUT_REG_SET     BIT(4) /* reg_set stores output value */
 277  #define BGPIOF_NO_OUTPUT               BIT(5) /* only input */
 278  #define BGPIOF_NO_SET_ON_INPUT         BIT(6)
 279 +#define BGPIOF_REG_DIRECT              BIT(7) /* ignore shadow registers */
 280
 281  int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
 282                      irq_hw_number_t hwirq);