target/linux/starfive/patches-6.1/0089-phy-starfive-Add-JH7110-USB-2.0-PHY-driver.patch

   1 From 3d74980ca3ba91dae6e84fbc23750e702e71d41a Mon Sep 17 00:00:00 2001
   2 From: Minda Chen <minda.chen@starfivetech.com>
   3 Date: Thu, 18 May 2023 19:27:46 +0800
   4 Subject: [PATCH 089/122] phy: starfive: Add JH7110 USB 2.0 PHY driver
   5
   6 Add Starfive JH7110 SoC USB 2.0 PHY driver support.
   7 USB 2.0 PHY default connect to Cadence USB controller.
   8
   9 Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
  10 ---
  11  drivers/phy/starfive/Kconfig          |  11 ++
  12  drivers/phy/starfive/Makefile         |   1 +
  13  drivers/phy/starfive/phy-jh7110-usb.c | 150 ++++++++++++++++++++++++++
  14  3 files changed, 162 insertions(+)
  15  create mode 100644 drivers/phy/starfive/phy-jh7110-usb.c
  16
  17 --- a/drivers/phy/starfive/Kconfig
  18 +++ b/drivers/phy/starfive/Kconfig
  19 @@ -11,3 +11,14 @@ config PHY_STARFIVE_DPHY_RX
  20           Choose this option if you have a StarFive D-PHY in your
  21           system. If M is selected, the module will be called
  22           phy-starfive-dphy-rx.
  23 +
  24 +config PHY_STARFIVE_JH7110_USB
  25 +       tristate "Starfive JH7110 USB 2.0 PHY support"
  26 +       depends on USB_SUPPORT
  27 +       select GENERIC_PHY
  28 +       select USB_PHY
  29 +       help
  30 +         Enable this to support the StarFive USB 2.0 PHY,
  31 +         used with the Cadence USB controller.
  32 +         If M is selected, the module will be called
  33 +         phy-jh7110-usb.ko.
  34 --- a/drivers/phy/starfive/Makefile
  35 +++ b/drivers/phy/starfive/Makefile
  36 @@ -1,2 +1,3 @@
  37  # SPDX-License-Identifier: GPL-2.0
  38  obj-$(CONFIG_PHY_STARFIVE_DPHY_RX)      += phy-starfive-dphy-rx.o
  39 +obj-$(CONFIG_PHY_STARFIVE_JH7110_USB)  += phy-jh7110-usb.o
  40 --- /dev/null
  41 +++ b/drivers/phy/starfive/phy-jh7110-usb.c
  42 @@ -0,0 +1,150 @@
  43 +// SPDX-License-Identifier: GPL-2.0+
  44 +/*
  45 + * StarFive JH7110 USB 2.0 PHY driver
  46 + *
  47 + * Copyright (C) 2023 StarFive Technology Co., Ltd.
  48 + * Author: Minda Chen <minda.chen@starfivetech.com>
  49 + */
  50 +
  51 +#include <linux/bits.h>
  52 +#include <linux/clk.h>
  53 +#include <linux/err.h>
  54 +#include <linux/io.h>
  55 +#include <linux/module.h>
  56 +#include <linux/phy/phy.h>
  57 +#include <linux/platform_device.h>
  58 +#include <linux/usb/of.h>
  59 +
  60 +#define USB_125M_CLK_RATE              125000000
  61 +#define USB_LS_KEEPALIVE_OFF           0x4
  62 +#define USB_LS_KEEPALIVE_ENABLE                BIT(4)
  63 +
  64 +struct jh7110_usb2_phy {
  65 +       struct phy *phy;
  66 +       void __iomem *regs;
  67 +       struct clk *usb_125m_clk;
  68 +       struct clk *app_125m;
  69 +       enum phy_mode mode;
  70 +};
  71 +
  72 +static void jh7110_usb2_mode_set(struct jh7110_usb2_phy *phy)
  73 +{
  74 +       unsigned int val;
  75 +
  76 +       if (phy->mode != PHY_MODE_USB_HOST) {
  77 +               /* Enable the LS speed keep-alive signal */
  78 +               val = readl(phy->regs + USB_LS_KEEPALIVE_OFF);
  79 +               val |= USB_LS_KEEPALIVE_ENABLE;
  80 +               writel(val, phy->regs + USB_LS_KEEPALIVE_OFF);
  81 +       }
  82 +}
  83 +
  84 +static int jh7110_usb2_phy_set_mode(struct phy *_phy,
  85 +                                   enum phy_mode mode, int submode)
  86 +{
  87 +       struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
  88 +
  89 +       switch (mode) {
  90 +       case PHY_MODE_USB_HOST:
  91 +       case PHY_MODE_USB_DEVICE:
  92 +       case PHY_MODE_USB_OTG:
  93 +               break;
  94 +       default:
  95 +               return -EINVAL;
  96 +       }
  97 +
  98 +       if (mode != phy->mode) {
  99 +               dev_dbg(&_phy->dev, "Changing phy to %d\n", mode);
 100 +               phy->mode = mode;
 101 +               jh7110_usb2_mode_set(phy);
 102 +       }
 103 +
 104 +       return 0;
 105 +}
 106 +
 107 +static int jh7110_usb2_phy_init(struct phy *_phy)
 108 +{
 109 +       struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
 110 +       int ret;
 111 +
 112 +       ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE);
 113 +       if (ret)
 114 +               return ret;
 115 +
 116 +       ret = clk_prepare_enable(phy->app_125m);
 117 +       if (ret)
 118 +               return ret;
 119 +
 120 +       return 0;
 121 +}
 122 +
 123 +static int jh7110_usb2_phy_exit(struct phy *_phy)
 124 +{
 125 +       struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy);
 126 +
 127 +       clk_disable_unprepare(phy->app_125m);
 128 +
 129 +       return 0;
 130 +}
 131 +
 132 +static const struct phy_ops jh7110_usb2_phy_ops = {
 133 +       .init           = jh7110_usb2_phy_init,
 134 +       .exit           = jh7110_usb2_phy_exit,
 135 +       .set_mode       = jh7110_usb2_phy_set_mode,
 136 +       .owner          = THIS_MODULE,
 137 +};
 138 +
 139 +static int jh7110_usb_phy_probe(struct platform_device *pdev)
 140 +{
 141 +       struct jh7110_usb2_phy *phy;
 142 +       struct device *dev = &pdev->dev;
 143 +       struct phy_provider *phy_provider;
 144 +
 145 +       phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
 146 +       if (!phy)
 147 +               return -ENOMEM;
 148 +
 149 +       phy->usb_125m_clk = devm_clk_get(dev, "125m");
 150 +       if (IS_ERR(phy->usb_125m_clk))
 151 +               return dev_err_probe(dev, PTR_ERR(phy->usb_125m_clk),
 152 +                       "Failed to get 125m clock\n");
 153 +
 154 +       phy->app_125m = devm_clk_get(dev, "app_125m");
 155 +       if (IS_ERR(phy->app_125m))
 156 +               return dev_err_probe(dev, PTR_ERR(phy->app_125m),
 157 +                       "Failed to get app 125m clock\n");
 158 +
 159 +       phy->regs = devm_platform_ioremap_resource(pdev, 0);
 160 +       if (IS_ERR(phy->regs))
 161 +               return dev_err_probe(dev, PTR_ERR(phy->regs),
 162 +                       "Failed to map phy base\n");
 163 +
 164 +       phy->phy = devm_phy_create(dev, NULL, &jh7110_usb2_phy_ops);
 165 +       if (IS_ERR(phy->phy))
 166 +               return dev_err_probe(dev, PTR_ERR(phy->phy),
 167 +                       "Failed to create phy\n");
 168 +
 169 +       phy_set_drvdata(phy->phy, phy);
 170 +       phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 171 +
 172 +       return PTR_ERR_OR_ZERO(phy_provider);
 173 +}
 174 +
 175 +static const struct of_device_id jh7110_usb_phy_of_match[] = {
 176 +       { .compatible = "starfive,jh7110-usb-phy" },
 177 +       { /* sentinel */ },
 178 +};
 179 +MODULE_DEVICE_TABLE(of, jh7110_usb_phy_of_match);
 180 +
 181 +static struct platform_driver jh7110_usb_phy_driver = {
 182 +       .probe  = jh7110_usb_phy_probe,
 183 +       .driver = {
 184 +               .of_match_table = jh7110_usb_phy_of_match,
 185 +               .name  = "jh7110-usb-phy",
 186 +       }
 187 +};
 188 +module_platform_driver(jh7110_usb_phy_driver);
 189 +
 190 +MODULE_DESCRIPTION("StarFive JH7110 USB 2.0 PHY driver");
 191 +MODULE_AUTHOR("Minda Chen <minda.chen@starfivetech.com>");
 192 +MODULE_LICENSE("GPL");