2 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/errno.h>
15 DECLARE_GLOBAL_DATA_PTR
;
17 static const void *get_memory_reg_prop(const void *fdt
, int *lenp
)
21 offset
= fdt_path_offset(fdt
, "/memory");
25 return fdt_getprop(fdt
, offset
, "reg", lenp
);
30 const void *fdt
= gd
->fdt_blob
;
34 ac
= fdt_address_cells(fdt
, 0);
35 sc
= fdt_size_cells(fdt
, 0);
36 if (ac
< 0 || sc
< 1 || sc
> 2) {
37 printf("invalid address/size cells\n");
41 val
= get_memory_reg_prop(fdt
, &len
);
42 if (len
/ sizeof(*val
) < ac
+ sc
)
47 gd
->ram_size
= fdtdec_get_number(val
, sc
);
49 debug("DRAM size = %08lx\n", (unsigned long)gd
->ram_size
);
54 void dram_init_banksize(void)
56 const void *fdt
= gd
->fdt_blob
;
58 int ac
, sc
, cells
, len
, i
;
60 val
= get_memory_reg_prop(fdt
, &len
);
64 ac
= fdt_address_cells(fdt
, 0);
65 sc
= fdt_size_cells(fdt
, 0);
66 if (ac
< 1 || sc
> 2 || sc
< 1 || sc
> 2) {
67 printf("invalid address/size cells\n");
75 for (i
= 0; i
< CONFIG_NR_DRAM_BANKS
&& len
>= cells
;
77 gd
->bd
->bi_dram
[i
].start
= fdtdec_get_number(val
, ac
);
79 gd
->bd
->bi_dram
[i
].size
= fdtdec_get_number(val
, sc
);
82 debug("DRAM bank %d: start = %08lx, size = %08lx\n",
83 i
, (unsigned long)gd
->bd
->bi_dram
[i
].start
,
84 (unsigned long)gd
->bd
->bi_dram
[i
].size
);
88 #ifdef CONFIG_OF_BOARD_SETUP
90 * The DRAM PHY requires 64 byte scratch area in each DRAM channel
91 * for its dynamic PHY training feature.
93 int ft_board_setup(void *fdt
, bd_t
*bd
)
95 const struct uniphier_board_data
*param
;
96 unsigned long rsv_addr
;
97 const unsigned long rsv_size
= 64;
100 if (uniphier_get_soc_id() != UNIPHIER_LD20_ID
)
103 param
= uniphier_get_board_param();
105 printf("failed to get board parameter\n");
109 for (ch
= 0; ch
< param
->dram_nr_ch
; ch
++) {
110 rsv_addr
= param
->dram_ch
[ch
].base
+ param
->dram_ch
[ch
].size
;
111 rsv_addr
-= rsv_size
;
113 ret
= fdt_add_mem_rsv(fdt
, rsv_addr
, rsv_size
);
117 printf(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",