1 /* SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019 Broadcom Ltd.
6 <:copyright-BRCM:2013:DUAL/GPL:standard
8 Copyright (c) 2013 Broadcom
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License, version 2, as published by
13 the Free Software Foundation (the "GPL").
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
21 A copy of the GPL is available at http://www.broadcom.com/licenses/GPLv2.php, or by
22 writing to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA.
28 /*****************************************************************************
30 * This contains header for PMC driver.
31 *****************************************************************************/
36 #include "pmc_drv_special.h"
38 // this is for the host
39 #define PMC_LITTLE_ENDIAN 1
41 #if IS_BCMCHIP(6846) || IS_BCMCHIP(6856) || IS_BCMCHIP(63178) || \
42 IS_BCMCHIP(47622) || IS_BCMCHIP(63146) || IS_BCMCHIP(4912) || \
45 #elif IS_BCMCHIP(6878) || IS_BCMCHIP(6855)
46 #define PMC_ON_HOSTCPU 1
48 #define PMC_CPU_BIG_ENDIAN 1
51 #if IS_BCMCHIP(63178) || IS_BCMCHIP(47622) || IS_BCMCHIP(63146) || \
53 #define PMC_LOG_IN_DTCM 1
56 #if IS_BCMCHIP(63146) || IS_BCMCHIP(4912)
57 #define PMC_FW_IN_ITCM 1
61 #define PMC_BOOT_TMO_SECONDS 2
63 #define PMC_BOOT_TMO_SECONDS 0
66 #if defined(CFG_RAMAPP) && (defined(PMC_IMPL_3_X) || IS_BCMCHIP(63158)) && \
67 !defined(CONFIG_BRCM_IKOS)
69 //#if defined(PMC_IMPL_3_X)
73 #define PMC_IN_MAIN_LOOP kPMCRunStateRunning
75 #define PMC_IN_MAIN_LOOP 6
79 /* there are 32 DQM, since REPLY DQM will always be one after the REQUEST
80 * DQM, we should use use 0 to 30 for REQ DQM, so RPL DQM will be 1 to 31 */
81 /* 63138 has pair of DQM#0+DQM#1, #2+#3, #4+#5, and #6+#7. We will use
83 #define PMC_DQM_REQ_NUM 0
85 #define PMC_DQM_RPL_NUM (PMC_DQM_REQ_NUM + 1)
86 #define PMC_DQM_RPL_STS (1 << PMC_DQM_RPL_NUM)
88 #define PMC_MODE_DQM 0
89 #define PMC_MODE_PMB_DIRECT 1
91 #define PMC_ACCESS_BPCM_DIRECT 1
93 #define PMC_ACCESS_BPCM_DIRECT 0
96 #ifndef _LANGUAGE_ASSEMBLY
97 // ---------------------------- Returned error codes --------------------------
99 // 0..15 may come from either the interface or from the PMC command handler
100 // 256 or greater only come from the interface
106 kPMC_INVALID_COMMAND
,
109 kPMC_BPCM_READ_TIMEOUT
,
111 kPMC_INVALID_QUEUE_NUMBER
,
112 kPMC_QUEUE_NOT_AVAILABLE
,
113 kPMC_INVALID_TOKEN_SIZE
,
114 kPMC_INVALID_WATERMARKS
,
115 kPMC_INSUFFICIENT_QSM_MEMORY
,
116 kPMC_INVALID_BOOT_COMMAND
,
118 kPMC_COMMAND_TIMEOUT
= 256,
119 kPMC_MESSAGE_ID_MISMATCH
,
122 // ---------------------------- Returned log entry structure --------------------------
133 uint32_t logReplyNum
:8;
136 uint32_t e_DevAddr
:8;
142 // ---------------------------- Power states --------------------------
144 kPMCPowerState_Unknown
,
145 kPMCPowerState_NoPower
,
146 kPMCPowerState_LowPower
,
147 kPMCPowerState_FullPower
,
152 kPMCRunStateExecutingBootROM
= 0,
153 kPMCRunStateWaitingBMUComplete
,
154 kPMCRunStateAVSCompleteWaitingForImage
,
155 kPMCRunStateAuthenticatingImage
,
156 kPMCRunStateAuthenticationFailed
,
157 kPMCRunStateReserved
,
162 // the only valid "gear" values for "SetClockGear" function
170 // PMC Boot options ( parameter for pmc_boot function )
174 kPMCBootAVSTrackDisable
,
179 // int TuneRunner(void);
180 // int GetSelect0(void);
181 // int GetSelect3(void);
183 void pmc_reset(void);
184 void pmc_initmode(void);
185 // int get_pmc_boot_param(unsigned boot_option, unsigned *boot_param);
186 void pmc_log(int log_type
);
187 void pmc_save_log_item(void);
188 void pmc_show_log_item(void);
189 int read_bpcm_reg_direct(int devAddr
, int wordOffset
, uint32_t * value
);
190 int write_bpcm_reg_direct(int devAddr
, int wordOffset
, uint32_t value
);
191 int GetRevision(unsigned int *change
, unsigned int *revision
);
192 int GetPVT(int sel
, int island
, int *value
);
193 #if (!defined(PMC_IMPL_3_X) && !defined(PMC_ON_HOSTCPU)) || IS_BCMCHIP(63178) || IS_BCMCHIP(47622)
194 int GetRCalSetting(int resistor
, int *rcal
);
196 int GetDevPresence(int devAddr
, int *value
);
197 int GetSWStrap(int devAddr
, int *value
);
198 int GetHWRev(int devAddr
, int *value
);
199 int GetNumZones(int devAddr
, int *value
);
200 int GetAvsDisableState(int island
, int *state
);
202 int GetErrorLogEntry(TErrorLogEntry
* logEntry
);
203 int SetClockHighGear(int devAddr
, int zone
, int clkN
);
204 int SetClockLowGear(int devAddr
, int zone
, int clkN
);
205 int SetClockGear(int devAddr
, int zone
, int gear
);
206 int SetRunState(int island
, int state
);
207 int SetPowerState(int island
, int state
);
208 #if !defined(PMC_ON_HOSTCPU)
209 void BootPmcNoRom(unsigned long physAddr
);
211 int ReadBPCMRegister(int devAddr
, int wordOffset
, uint32_t * value
);
212 int WriteBPCMRegister(int devAddr
, int wordOffset
, uint32_t value
);
213 int ReadZoneRegister(int devAddr
, int zone
, int wordOffset
, uint32_t * value
);
214 int WriteZoneRegister(int devAddr
, int zone
, int wordOffset
, uint32_t value
);
215 int PowerOnDevice(int devAddr
);
216 int PowerOffDevice(int devAddr
, int repower
);
217 int PowerOnZone(int devAddr
, int zone
);
218 int PowerOffZone(int devAddr
, int zone
);
219 int ResetDevice(int devAddr
);
220 int ResetZone(int devAddr
, int zone
);
221 int CloseAVS(int island
, unsigned short margin_mv_slow
,
222 unsigned short margin_mv_fast
, unsigned short maximum_mv
,
223 unsigned short minimum_mv
);
225 int RecloseAVS(int iscold
);
227 void WaitPmc(int runState
, void* pmc_log
);
228 #if IS_BCMCHIP(63138) || IS_BCMCHIP(63148) || IS_BCMCHIP(6858) || \
231 int UnstallPmc(void);
234 int GetAllROs(uint32_t pa
);
246 int pmc_convert_pvtmon(int sel
, int value
);
247 int pmc_get_tracktemp(int *status
);
248 int pmc_set_tracktemp(int enable
);
249 #endif //_LANGUAGE_ASSEMBLY