ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000>, <0xe105400 0x400>;
- reg-names = "config", "ctrl";
+ reg = <0xe105400 0x400>, <0x7000000 0x8000>;
+ reg-names = "ctrl", "config";
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000>, <0xe105400 0x400>;
- reg-names = "config", "ctrl";
+ reg = <0xe105400 0x400>, <0x7000000 0x8000>;
+ reg-names = "ctrl", "config";
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000>, <0xe105400 0x400>;
- reg-names = "config", "ctrl";
+ reg = <0xe105400 0x400>, <0x7000000 0x8000>;
+ reg-names = "ctrl", "config";
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
--- /dev/null
+From ffb73d853dbdebf824bb558dc79f96a4b16cdd2b Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Mon, 28 Jan 2019 21:33:09 +0100
+Subject: [PATCH 6/6] MIPS: lantiq: fix unit mismatch devicetree compiler
+ warning
+
+Reorder the register property values to have the nodes unit address in
+first place. Rename the PCI clocks accordingly.
+
+Fixes a unit mismatch devcietree compiler warning.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/boot/dts/lantiq/danube.dtsi | 4 ++--
+ arch/mips/lantiq/xway/sysctrl.c | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
+index b4323b2214e2..8d3515bdf0d8 100644
+--- a/arch/mips/lantiq/xway/sysctrl.c
++++ b/arch/mips/lantiq/xway/sysctrl.c
+@@ -352,7 +352,7 @@ static void clkdev_add_pci(void)
+ struct clk *clk_ext = kzalloc(sizeof(struct clk), GFP_KERNEL);
+
+ /* main pci clock */
+- clk->cl.dev_id = "17000000.pci";
++ clk->cl.dev_id = "1e105400.pci";
+ clk->cl.con_id = NULL;
+ clk->cl.clk = clk;
+ clk->rate = CLOCK_33M;
+@@ -364,7 +364,7 @@ static void clkdev_add_pci(void)
+ clkdev_add(&clk->cl);
+
+ /* use internal/external bus clock */
+- clk_ext->cl.dev_id = "17000000.pci";
++ clk_ext->cl.dev_id = "1e105400.pci";
+ clk_ext->cl.con_id = "external";
+ clk_ext->cl.clk = clk_ext;
+ clk_ext->enable = pci_ext_enable;
+--
+2.17.1
+
--- /dev/null
+From ffb73d853dbdebf824bb558dc79f96a4b16cdd2b Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Mon, 28 Jan 2019 21:33:09 +0100
+Subject: [PATCH 6/6] MIPS: lantiq: fix unit mismatch devicetree compiler
+ warning
+
+Reorder the register property values to have the nodes unit address in
+first place. Rename the PCI clocks accordingly.
+
+Fixes a unit mismatch devcietree compiler warning.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/boot/dts/lantiq/danube.dtsi | 4 ++--
+ arch/mips/lantiq/xway/sysctrl.c | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
+index b4323b2214e2..8d3515bdf0d8 100644
+--- a/arch/mips/lantiq/xway/sysctrl.c
++++ b/arch/mips/lantiq/xway/sysctrl.c
+@@ -352,7 +352,7 @@ static void clkdev_add_pci(void)
+ struct clk *clk_ext = kzalloc(sizeof(struct clk), GFP_KERNEL);
+
+ /* main pci clock */
+- clk->cl.dev_id = "17000000.pci";
++ clk->cl.dev_id = "1e105400.pci";
+ clk->cl.con_id = NULL;
+ clk->cl.clk = clk;
+ clk->rate = CLOCK_33M;
+@@ -364,7 +364,7 @@ static void clkdev_add_pci(void)
+ clkdev_add(&clk->cl);
+
+ /* use internal/external bus clock */
+- clk_ext->cl.dev_id = "17000000.pci";
++ clk_ext->cl.dev_id = "1e105400.pci";
+ clk_ext->cl.con_id = "external";
+ clk_ext->cl.clk = clk_ext;
+ clk_ext->enable = pci_ext_enable;
+--
+2.17.1
+