target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
   3
   4 /dts-v1/;
   5
   6 #include "ipq8074.dtsi"
   7 #include "ipq8074-hk-cpu.dtsi"
   8 #include "ipq8074-ess.dtsi"
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/input/input.h>
  11 #include <dt-bindings/leds/common.h>
  12
  13 / {
  14         model = "Xiaomi AX9000";
  15         compatible = "xiaomi,ax9000", "qcom,ipq8074";
  16
  17         aliases {
  18                 serial0 = &blsp1_uart5;
  19                 led-boot = &led_system_yellow;
  20                 led-failsafe = &led_system_yellow;
  21                 led-running = &led_system_blue;
  22                 led-upgrade = &led_system_yellow;
  23                 label-mac-device = &dp5;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28                 bootargs-append = " root=/dev/ubiblock0_0";
  29         };
  30
  31         keys {
  32                 compatible = "gpio-keys";
  33
  34                 reset {
  35                         label = "reset";
  36                         gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  37                         linux,code = <KEY_RESTART>;
  38                 };
  39
  40                 wps {
  41                         label = "wps"; /* Labeled Mesh on the device */
  42                         gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
  43                         linux,code = <KEY_WPS_BUTTON>;
  44                 };
  45         };
  46
  47         leds {
  48                 compatible = "gpio-leds";
  49
  50                 led_system_blue: system-blue {
  51                         gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
  52                         color = <LED_COLOR_ID_BLUE>;
  53                 };
  54
  55                 led_system_yellow: system-yellow {
  56                         gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
  57                         color = <LED_COLOR_ID_YELLOW>;
  58                 };
  59
  60                 network-yellow {
  61                         gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
  62                         color = <LED_COLOR_ID_YELLOW>;
  63                 };
  64
  65                 network-blue {
  66                         gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
  67                         color = <LED_COLOR_ID_BLUE>;
  68                 };
  69
  70                 top-red {
  71                         gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
  72                         color = <LED_COLOR_ID_RED>;
  73                         default-state = "keep";
  74                 };
  75
  76                 top-green {
  77                         gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
  78                         color = <LED_COLOR_ID_GREEN>;
  79                         default-state = "keep";
  80                 };
  81
  82                 top-blue {
  83                         gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
  84                         color = <LED_COLOR_ID_BLUE>;
  85                         default-state = "keep";
  86                 };
  87         };
  88 };
  89
  90 &tlmm {
  91         mdio_pins: mdio-pins {
  92                 mdc {
  93                         pins = "gpio68";
  94                         function = "mdc";
  95                         drive-strength = <8>;
  96                         bias-pull-up;
  97                 };
  98
  99                 mdio {
 100                         pins = "gpio69";
 101                         function = "mdio";
 102                         drive-strength = <8>;
 103                         bias-pull-up;
 104                 };
 105         };
 106
 107         i2c_pins: i2c-pins {
 108                 pins = "gpio0", "gpio2";
 109                 function = "blsp5_i2c";
 110                 drive-strength = <8>;
 111                 bias-disable;
 112         };
 113 };
 114
 115 &blsp1_uart5 {
 116         status = "okay";
 117 };
 118
 119 &blsp1_i2c6 {
 120         status = "okay";
 121
 122         pinctrl-0 = <&i2c_pins>;
 123         pinctrl-names = "default";
 124 };
 125
 126 &prng {
 127         status = "okay";
 128 };
 129
 130 &cryptobam {
 131         status = "okay";
 132 };
 133
 134 &crypto {
 135         status = "okay";
 136 };
 137
 138 &qpic_bam {
 139         status = "okay";
 140 };
 141
 142 &qpic_nand {
 143         status = "okay";
 144
 145         /*
 146          * Bootloader will find the NAND DT node by the compatible and
 147          * then "fixup" it by adding the partitions from the SMEM table
 148          * using the legacy bindings thus making it impossible for us
 149          * to change the partition table or utilize NVMEM for calibration.
 150          * So add a dummy partitions node that bootloader will populate
 151          * and set it as disabled so the kernel ignores it instead of
 152          * printing warnings due to the broken way bootloader adds the
 153          * partitions.
 154          */
 155         partitions {
 156                 status = "disabled";
 157         };
 158
 159         nand@0 {
 160                 reg = <0>;
 161                 nand-ecc-strength = <4>;
 162                 nand-ecc-step-size = <512>;
 163                 nand-bus-width = <8>;
 164
 165                 partitions {
 166                         compatible = "fixed-partitions";
 167                         #address-cells = <1>;
 168                         #size-cells = <1>;
 169
 170                         partition@0 {
 171                                 label = "0:sbl1";
 172                                 reg = <0x0 0x100000>;
 173                                 read-only;
 174                         };
 175
 176                         partition@100000 {
 177                                 label = "0:mibib";
 178                                 reg = <0x100000 0x100000>;
 179                                 read-only;
 180                         };
 181
 182                         partition@200000 {
 183                                 label = "0:bootconfig";
 184                                 reg = <0x200000 0x80000>;
 185                                 read-only;
 186                         };
 187
 188                         partition@280000 {
 189                                 label = "0:bootconfig1";
 190                                 reg = <0x280000 0x80000>;
 191                                 read-only;
 192                         };
 193
 194                         partition@300000 {
 195                                 label = "0:qsee";
 196                                 reg = <0x300000 0x300000>;
 197                                 read-only;
 198                         };
 199
 200                         partition@600000 {
 201                                 label = "0:qsee_1";
 202                                 reg = <0x600000 0x300000>;
 203                                 read-only;
 204                         };
 205
 206                         partition@900000 {
 207                                 label = "0:devcfg";
 208                                 reg = <0x900000 0x80000>;
 209                                 read-only;
 210                         };
 211
 212                         partition@980000 {
 213                                 label = "0:devcfg_1";
 214                                 reg = <0x980000 0x80000>;
 215                                 read-only;
 216                         };
 217
 218                         partition@a00000 {
 219                                 label = "0:apdp";
 220                                 reg = <0xa00000 0x80000>;
 221                                 read-only;
 222                         };
 223
 224                         partition@a80000 {
 225                                 label = "0:apdp_1";
 226                                 reg = <0xa80000 0x80000>;
 227                                 read-only;
 228                         };
 229
 230                         partition@b00000 {
 231                                 label = "0:rpm";
 232                                 reg = <0xb00000 0x80000>;
 233                                 read-only;
 234                         };
 235
 236                         partition@b80000 {
 237                                 label = "0:rpm_1";
 238                                 reg = <0xb80000 0x80000>;
 239                                 read-only;
 240                         };
 241
 242                         partition@c00000 {
 243                                 label = "0:cdt";
 244                                 reg = <0xc00000 0x80000>;
 245                                 read-only;
 246                         };
 247
 248                         partition@c80000 {
 249                                 label = "0:cdt_1";
 250                                 reg = <0xc80000 0x80000>;
 251                                 read-only;
 252                         };
 253
 254                         partition@d00000 {
 255                                 label = "0:appsblenv";
 256                                 reg = <0xd00000 0x80000>;
 257                         };
 258
 259                         partition@d80000 {
 260                                 label = "0:appsbl";
 261                                 reg = <0xd80000 0x100000>;
 262                                 read-only;
 263                         };
 264
 265                         partition@e80000 {
 266                                 label = "0:appsbl_1";
 267                                 reg = <0xe80000 0x100000>;
 268                                 read-only;
 269                         };
 270
 271                         partition@f80000 {
 272                                 label = "0:art";
 273                                 reg = <0xf80000 0x80000>;
 274                                 read-only;
 275
 276                                 nvmem-layout {
 277                                         compatible = "fixed-layout";
 278                                         #address-cells = <1>;
 279                                         #size-cells = <1>;
 280
 281                                         macaddr_dp1: macaddr@0 {
 282                                                 reg = <0x0 0x6>;
 283                                         };
 284
 285                                         macaddr_dp2: macaddr@6 {
 286                                                 reg = <0x6 0x6>;
 287                                         };
 288
 289                                         macaddr_dp3: macaddr@c {
 290                                                 reg = <0xc 0x6>;
 291                                         };
 292
 293                                         macaddr_dp4: macaddr@12 {
 294                                                 reg = <0x12 0x6>;
 295                                         };
 296
 297                                         macaddr_dp5: macaddr@18 {
 298                                                 reg = <0x18 0x6>;
 299                                         };
 300
 301                                         caldata_qca9889: caldata@4d000 {
 302                                                 reg = <0x4d000 0x844>;
 303                                         };
 304                                 };
 305                         };
 306
 307                         partition@1000000 {
 308                                 label = "bdata";
 309                                 reg = <0x1000000 0x80000>;
 310                         };
 311
 312                         partition@1080000 {
 313                                 /* This is crash + crash_syslog parts combined */
 314                                 label = "pstore";
 315                                 reg = <0x1080000 0x100000>;
 316                         };
 317
 318                         partition@1180000 {
 319                                 label = "ubi_kernel";
 320                                 reg = <0x1180000 0x3800000>;
 321                         };
 322
 323                         partition@4980000 {
 324                                 label = "rootfs";
 325                                 reg = <0x4980000 0xb680000>;
 326                         };
 327                 };
 328         };
 329 };
 330
 331 &qusb_phy_0 {
 332         status = "okay";
 333 };
 334
 335 &ssphy_0 {
 336         status = "okay";
 337 };
 338
 339 &usb_0 {
 340         status = "okay";
 341 };
 342
 343 &mdio {
 344         status = "okay";
 345
 346         pinctrl-0 = <&mdio_pins>;
 347         pinctrl-names = "default";
 348         reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
 349
 350         qca8075_0: ethernet-phy@0 {
 351                 compatible = "ethernet-phy-ieee802.3-c22";
 352                 reg = <0>;
 353         };
 354
 355         qca8075_1: ethernet-phy@1 {
 356                 compatible = "ethernet-phy-ieee802.3-c22";
 357                 reg = <1>;
 358         };
 359
 360         qca8075_2: ethernet-phy@2 {
 361                 compatible = "ethernet-phy-ieee802.3-c22";
 362                 reg = <2>;
 363         };
 364
 365         qca8075_3: ethernet-phy@3 {
 366                 compatible = "ethernet-phy-ieee802.3-c22";
 367                 reg = <3>;
 368         };
 369
 370         qca8081: ethernet-phy@24 {
 371                 compatible = "ethernet-phy-id004d.d101";
 372                 reg = <24>;
 373                 reset-deassert-us = <10000>;
 374                 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 375
 376                 leds {
 377                         #address-cells = <1>;
 378                         #size-cells = <0>;
 379
 380                         led@0 {
 381                                 reg = <0>;
 382                                 color = <LED_COLOR_ID_GREEN>;
 383                                 function = LED_FUNCTION_WAN;
 384                                 default-state = "keep";
 385                         };
 386                 };
 387         };
 388 };
 389
 390 &switch {
 391         status = "okay";
 392
 393         switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; /* lan port bitmap */
 394         switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
 395         switch_mac_mode = <MAC_MODE_QSGMII>; /* mac mode for uniphy instance0*/
 396         switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance1*/
 397
 398         qcom,port_phyinfo {
 399                 port@1 {
 400                         port_id = <1>;
 401                         phy_address = <0>;
 402                 };
 403                 port@2 {
 404                         port_id = <2>;
 405                         phy_address = <1>;
 406                 };
 407                 port@3 {
 408                         port_id = <3>;
 409                         phy_address = <2>;
 410                 };
 411                 port@4 {
 412                         port_id = <4>;
 413                         phy_address = <3>;
 414                 };
 415                 port@5 {
 416                         port_id = <5>;
 417                         phy_address = <24>;
 418                         port_mac_sel = "QGMAC_PORT";
 419                 };
 420         };
 421 };
 422
 423 &edma {
 424         status = "okay";
 425 };
 426
 427 &dp1 {
 428         status = "okay";
 429         phy-handle = <&qca8075_0>;
 430         label = "lan4";
 431         nvmem-cells = <&macaddr_dp1>;
 432         nvmem-cell-names = "mac-address";
 433 };
 434
 435 &dp2 {
 436         status = "okay";
 437         phy-handle = <&qca8075_1>;
 438         label = "lan3";
 439         nvmem-cells = <&macaddr_dp2>;
 440         nvmem-cell-names = "mac-address";
 441 };
 442
 443 &dp3 {
 444         status = "okay";
 445         phy-handle = <&qca8075_2>;
 446         label = "lan2";
 447         nvmem-cells = <&macaddr_dp3>;
 448         nvmem-cell-names = "mac-address";
 449 };
 450
 451 &dp4 {
 452         status = "okay";
 453         phy-handle = <&qca8075_3>;
 454         label = "lan1";
 455         nvmem-cells = <&macaddr_dp4>;
 456         nvmem-cell-names = "mac-address";
 457 };
 458
 459 &dp5 {
 460         status = "okay";
 461         phy-handle = <&qca8081>;
 462         label = "wan";
 463         nvmem-cells = <&macaddr_dp5>;
 464         nvmem-cell-names = "mac-address";
 465 };
 466
 467 &pcie_qmp0 {
 468         status = "okay";
 469 };
 470
 471 &pcie0 {
 472         status = "okay";
 473
 474         perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
 475
 476         bridge@0,0 {
 477                 reg = <0x00000000 0 0 0 0>;
 478                 #address-cells = <3>;
 479                 #size-cells = <2>;
 480                 ranges;
 481
 482                 wifi@1,0 {
 483                         status = "okay";
 484
 485                         /* ath11k has no DT compatible for PCI cards */
 486                         compatible = "pci17cb,1104";
 487                         reg = <0x00010000 0 0 0 0>;
 488
 489                         qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
 490                 };
 491         };
 492 };
 493
 494 &pcie_qmp1 {
 495         status = "okay";
 496 };
 497
 498 &pcie1 {
 499         status = "okay";
 500
 501         perst-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
 502
 503         bridge@1,0 {
 504                 reg = <0x00010000 0 0 0 0>;
 505                 #address-cells = <3>;
 506                 #size-cells = <2>;
 507                 ranges;
 508
 509                 wifi@1,0 {
 510                         status = "okay";
 511
 512                         compatible = "qcom,ath10k";
 513                         reg = <0x00010000 0 0 0 0>;
 514
 515                         qcom,ath10k-calibration-variant = "Xiaomi-AX9000";
 516                         nvmem-cell-names = "calibration";
 517                         nvmem-cells = <&caldata_qca9889>;
 518                 };
 519         };
 520 };
 521
 522 &wifi {
 523         status = "okay";
 524
 525         qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
 526 };