target/linux/mediatek/dts/mt7986a-tplink-tl-xdr-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 #include "mt7986a.dtsi"
   7
   8 / {
   9         aliases {
  10                 serial0 = &uart0;
  11                 label-mac-device = &gmac0;
  12                 led-boot = &led_status_green;
  13                 led-failsafe = &led_status_red;
  14                 led-running = &led_status_green;
  15                 led-upgrade = &led_status_red;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20         };
  21
  22         memory {
  23                 reg = <0 0x40000000 0 0x20000000>;
  24         };
  25
  26         reg_3p3v: regulator-3p3v {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "fixed-3.3V";
  29                 regulator-min-microvolt = <3300000>;
  30                 regulator-max-microvolt = <3300000>;
  31                 regulator-boot-on;
  32                 regulator-always-on;
  33         };
  34
  35         reg_5v: regulator-5v {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "fixed-5V";
  38                 regulator-min-microvolt = <5000000>;
  39                 regulator-max-microvolt = <5000000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         keys {
  45                 compatible = "gpio-keys";
  46
  47                 reset {
  48                         label = "reset";
  49                         linux,code = <KEY_RESTART>;
  50                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  51                 };
  52
  53                 wps {
  54                         label = "wps";
  55                         linux,code = <KEY_WPS_BUTTON>;
  56                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 turbo {
  60                         label = "turbo";
  61                         linux,code = <BTN_1>;
  62                         gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  63                 };
  64         };
  65
  66         leds {
  67                 compatible = "gpio-leds";
  68
  69                 led_status_red: status_red {
  70                         label = "red:status";
  71                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  72                 };
  73
  74                 led_status_green: status_green {
  75                         label = "green:status";
  76                         gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
  77                 };
  78
  79                 turbo {
  80                         label = "green:turbo";
  81                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  82                 };
  83         };
  84 };
  85
  86 &eth {
  87         status = "okay";
  88
  89         gmac0: mac@0 {
  90                 compatible = "mediatek,eth-mac";
  91                 reg = <0>;
  92                 phy-mode = "2500base-x";
  93
  94                 nvmem-cells = <&macaddr_config_1c>;
  95                 nvmem-cell-names = "mac-address";
  96
  97                 fixed-link {
  98                         speed = <2500>;
  99                         full-duplex;
 100                         pause;
 101                 };
 102         };
 103
 104         gmac1: mac@1 {
 105                 compatible = "mediatek,eth-mac";
 106                 reg = <1>;
 107                 phy-handle = <&phy7>;
 108                 phy-mode = "2500base-x";
 109
 110                 nvmem-cells = <&macaddr_config_1c>;
 111                 nvmem-cell-names = "mac-address";
 112                 mac-address-increment = <1>;
 113         };
 114
 115         mdio: mdio-bus {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118         };
 119 };
 120
 121 &mdio {
 122         phy5: ethernet-phy@5 {
 123                 compatible = "ethernet-phy-ieee802.3-c45";
 124                 reg = <5>;
 125                 reset-assert-us = <100000>;
 126                 reset-deassert-us = <100000>;
 127                 reset-gpios = <&pio 13 GPIO_ACTIVE_LOW>;
 128                 realtek,aldps-enable;
 129         };
 130
 131         phy7: ethernet-phy@7 {
 132                 compatible = "ethernet-phy-ieee802.3-c45";
 133                 reg = <7>;
 134                 reset-assert-us = <100000>;
 135                 reset-deassert-us = <100000>;
 136                 reset-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
 137                 realtek,aldps-enable;
 138         };
 139
 140         switch: switch@31 {
 141                 compatible = "mediatek,mt7531";
 142                 reg = <31>;
 143                 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 144                 interrupt-controller;
 145                 #interrupt-cells = <1>;
 146                 interrupt-parent = <&pio>;
 147                 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 148         };
 149 };
 150
 151 &spi0 {
 152         pinctrl-names = "default";
 153         pinctrl-0 = <&spi_flash_pins>;
 154         status = "okay";
 155
 156         flash@0 {
 157                 compatible = "spi-nand";
 158                 #address-cells = <1>;
 159                 #size-cells = <1>;
 160                 reg = <0>;
 161
 162                 spi-max-frequency = <20000000>;
 163                 spi-tx-buswidth = <4>;
 164                 spi-rx-buswidth = <4>;
 165
 166                 partitions {
 167                         compatible = "fixed-partitions";
 168                         #address-cells = <1>;
 169                         #size-cells = <1>;
 170
 171                         partition@0 {
 172                                 label = "bl2";
 173                                 reg = <0x000000 0x0100000>;
 174                                 read-only;
 175                         };
 176
 177                         config: partition@100000 {
 178                                 label = "config";
 179                                 reg = <0x100000 0x0060000>;
 180                                 read-only;
 181                         };
 182
 183                         factory: partition@160000 {
 184                                 label = "factory";
 185                                 reg = <0x160000 0x0060000>;
 186                                 read-only;
 187                         };
 188
 189                         partition@1c0000 {
 190                                 label = "reserved";
 191                                 reg = <0x1c0000 0x01c0000>;
 192                                 read-only;
 193                         };
 194
 195                         partition@380000 {
 196                                 label = "fip";
 197                                 reg = <0x380000 0x0200000>;
 198                                 read-only;
 199                         };
 200
 201                         partition@580000 {
 202                                 label = "ubi";
 203                                 reg = <0x580000 0x7800000>;
 204                         };
 205                 };
 206         };
 207 };
 208
 209 &pio {
 210         spi_flash_pins: spi-flash-pins-33-to-38 {
 211                 mux {
 212                         function = "spi";
 213                         groups = "spi0", "spi0_wp_hold";
 214                 };
 215                 conf-pu {
 216                         pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 217                         drive-strength = <8>;
 218                         mediatek,pull-up-adv = <0>; /* bias-disable */
 219                 };
 220                 conf-pd {
 221                         pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 222                         drive-strength = <8>;
 223                         mediatek,pull-down-adv = <0>; /* bias-disable */
 224                 };
 225         };
 226 };
 227
 228 &ssusb {
 229         vusb33-supply = <&reg_3p3v>;
 230         vbus-supply = <&reg_5v>;
 231         status = "okay";
 232 };
 233
 234 &uart0 {
 235         status = "okay";
 236 };
 237
 238 &usb_phy {
 239         status = "okay";
 240 };
 241
 242 &wmac {
 243         mediatek,mtd-eeprom = <&factory 0x0>;
 244         nvmem-cells = <&macaddr_config_1c>;
 245         nvmem-cell-names = "mac-address";
 246         mac-address-increment = <2>;
 247         status = "okay";
 248 };
 249
 250 &config {
 251         compatible = "nvmem-cells";
 252         #address-cells = <1>;
 253         #size-cells = <1>;
 254
 255         macaddr_config_1c: macaddr@1c {
 256                 reg = <0x1c 0x6>;
 257         };
 258 };