treewide: remove label = "cpu" from DSA dt-binding
[openwrt/staging/noltari.git] / target / linux / mediatek / dts / mt7629-iptime-a6004mx.dts
1 // SPDX-License-Identifier: GPL-2.0
2
3 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "mt7629.dtsi"
6
7 / {
8 model = "ipTIME A6004MX";
9 compatible = "iptime,a6004mx", "mediatek,mt7629";
10
11 aliases {
12 led-boot = &led_cpu;
13 led-failsafe = &led_cpu;
14 led-running = &led_cpu;
15 led-upgrade = &led_cpu;
16 serial0 = &uart0;
17 };
18
19 chosen {
20 stdout-path = "serial0:115200n8";
21 bootargs-override = "console=ttyS0,115200n8";
22 };
23
24 leds {
25 compatible = "gpio-leds";
26
27 led_cpu: cpu {
28 label = "orange:cpu";
29 gpios = <&pio 57 GPIO_ACTIVE_LOW>;
30 };
31
32 wlan5g {
33 label = "orange:wlan5g";
34 gpios = <&pio 22 GPIO_ACTIVE_LOW>;
35 // linux,default-trigger = "phy0radio";
36 };
37
38 wlan2g {
39 label = "orange:wlan2g";
40 gpios = <&pio 21 GPIO_ACTIVE_LOW>;
41 // linux,default-trigger = "phy1radio";
42 };
43
44 wan {
45 label = "orange:wan";
46 gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
47 };
48 };
49
50 keys {
51 compatible = "gpio-keys";
52
53 reset {
54 label = "factory";
55 linux,code = <KEY_RESTART>;
56 gpios = <&pio 60 GPIO_ACTIVE_LOW>;
57 };
58
59 wps {
60 label = "wps";
61 linux,code = <KEY_WPS_BUTTON>;
62 gpios = <&pio 58 GPIO_ACTIVE_LOW>;
63 };
64 };
65
66 memory@40000000 {
67 device_type = "memory";
68 reg = <0x40000000 0x10000000>;
69 };
70
71 reg_3p3v: regulator-3p3v {
72 compatible = "regulator-fixed";
73 regulator-name = "fixed-3.3V";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76 regulator-boot-on;
77 regulator-always-on;
78 };
79
80 reg_5v: regulator-5v {
81 compatible = "regulator-fixed";
82 regulator-name = "fixed-5V";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
85 regulator-boot-on;
86 regulator-always-on;
87 };
88 };
89
90 &eth {
91 pinctrl-names = "default";
92 pinctrl-0 = <&eth_pins>;
93 pinctrl-1 = <&ephy_leds_pins>;
94 status = "okay";
95
96 gmac0: mac@0 {
97 compatible = "mediatek,eth-mac";
98 reg = <0>;
99 phy-mode = "2500base-x";
100 nvmem-cells = <&macaddr_factory_4>;
101 nvmem-cell-names = "mac-address";
102 mac-address-increment = <3>;
103
104 fixed-link {
105 speed = <2500>;
106 full-duplex;
107 pause;
108 };
109 };
110
111 gmac1: mac@1 {
112 compatible = "mediatek,eth-mac";
113 reg = <1>;
114 phy-mode = "gmii";
115 phy-handle = <&phy0>;
116 nvmem-cells = <&macaddr_factory_4>;
117 nvmem-cell-names = "mac-address";
118 mac-address-increment = <1>;
119 };
120
121 mdio: mdio-bus {
122 #address-cells = <1>;
123 #size-cells = <0>;
124
125 phy0: ethernet-phy@0 {
126 reg = <0>;
127 };
128
129 switch@2 {
130 compatible = "mediatek,mt7531";
131 reg = <2>;
132 reset-gpios = <&pio 28 0>;
133 interrupt-controller;
134 #interrupt-cells = <1>;
135 interrupt-parent = <&pio>;
136 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
137
138 ports {
139 #address-cells = <1>;
140 #size-cells = <0>;
141
142 port@0 {
143 reg = <0>;
144 label = "lan1";
145 };
146
147 port@1 {
148 reg = <1>;
149 label = "lan2";
150 };
151
152 port@2 {
153 reg = <2>;
154 label = "lan3";
155 };
156
157 port@3 {
158 reg = <3>;
159 label = "lan4";
160 };
161
162 port@6 {
163 reg = <6>;
164 ethernet = <&gmac0>;
165 phy-mode = "2500base-x";
166
167 fixed-link {
168 speed = <2500>;
169 full-duplex;
170 pause;
171 };
172 };
173 };
174 };
175 };
176 };
177
178 &bch {
179 status = "okay";
180 };
181
182 &snfi {
183 pinctrl-names = "default";
184 pinctrl-0 = <&serial_nand_pins>;
185 status = "okay";
186 flash@0 {
187 compatible = "spi-nand";
188 reg = <0>;
189 spi-tx-bus-width = <4>;
190 spi-rx-bus-width = <4>;
191 nand-ecc-engine = <&snfi>;
192 mediatek,bmt-v2;
193
194 partitions {
195 compatible = "fixed-partitions";
196 #address-cells = <1>;
197 #size-cells = <1>;
198
199 partition@0 {
200 label = "Bootloader";
201 reg = <0x0 0x100000>;
202 read-only;
203 };
204
205 partition@100000 {
206 label = "Config";
207 reg = <0x100000 0x40000>;
208 };
209
210 partition@140000 {
211 label = "factory";
212 reg = <0x140000 0x80000>;
213 read-only;
214
215 compatible = "nvmem-cells";
216 #address-cells = <1>;
217 #size-cells = <1>;
218
219 macaddr_factory_4: macaddr@4 {
220 reg = <0x4 0x6>;
221 };
222 };
223
224 partition@1c0000 {
225 label = "firmware";
226 reg = <0x1c0000 0x7400000>;
227 compatible = "denx,fit";
228 openwrt,fit-offset = <0x800>;
229 };
230 };
231 };
232 };
233
234 &pio {
235 eth_pins: eth-pins {
236 mux {
237 function = "eth";
238 groups = "mdc_mdio";
239 };
240 };
241
242 ephy_leds_pins: ephy-leds-pins {
243 mux {
244 function = "led";
245 groups = "ephy_leds";
246 };
247 };
248
249 /* Serial NAND is shared pin with SPI-NOR */
250 serial_nand_pins: serial-nand-pins {
251 mux {
252 function = "flash";
253 groups = "snfi";
254 };
255 };
256
257 uart0_pins: uart0-pins {
258 mux {
259 function = "uart";
260 groups = "uart0_txd_rxd" ;
261 };
262 };
263
264 watchdog_pins: watchdog-pins {
265 mux {
266 function = "watchdog";
267 groups = "watchdog";
268 };
269 };
270 };
271
272 &ssusb {
273 vusb33-supply = <&reg_3p3v>;
274 vbus-supply = <&reg_5v>;
275 status = "okay";
276 };
277
278 &uart0 {
279 pinctrl-names = "default";
280 pinctrl-0 = <&uart0_pins>;
281 status = "okay";
282 };
283
284 &watchdog {
285 pinctrl-names = "default";
286 pinctrl-0 = <&watchdog_pins>;
287 status = "okay";
288
289 interrupt-controller;
290 #interrupt-cells = <1>;
291 interrupt-parent = <&pio>;
292 interrupts = <GIC_SPI 0x80 IRQ_TYPE_EDGE_FALLING>;
293 };