target/linux/mediatek/dts/mt7622-ruijie-rg-ew3200.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6
   7 #include "mt7622.dtsi"
   8 #include "mt6380.dtsi"
   9
  10 / {
  11         aliases {
  12                 ethernet0 = &gmac0;
  13                 label-mac-device = &gmac0;
  14                 led-boot = &led_system;
  15                 led-failsafe = &led_system;
  16                 led-running = &led_system;
  17                 led-upgrade = &led_system;
  18                 serial0 = &uart0;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n1";
  23                 bootargs = "console=ttyS0,115200n1 swiotlb=512";
  24         };
  25
  26         cpus {
  27                 cpu@0 {
  28                         proc-supply = <&mt6380_vcpu_reg>;
  29                         sram-supply = <&mt6380_vm_reg>;
  30                 };
  31
  32                 cpu@1 {
  33                         proc-supply = <&mt6380_vcpu_reg>;
  34                         sram-supply = <&mt6380_vm_reg>;
  35                 };
  36         };
  37
  38         gpio-keys {
  39                 compatible = "gpio-keys";
  40
  41                 reset {
  42                         label = "reset";
  43                         linux,code = <KEY_RESTART>;
  44                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  45                 };
  46
  47                 wps {
  48                         label = "wps";
  49                         linux,code = <KEY_WPS_BUTTON>;
  50                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  51                 };
  52         };
  53
  54         gpio-leds {
  55                 compatible = "gpio-leds";
  56
  57                 mesh_green {
  58                         label = "green:mesh";
  59                         gpios = <&pio 79 GPIO_ACTIVE_LOW>;
  60                 };
  61
  62                 mesh_red {
  63                         label = "red:mesh";
  64                         gpios = <&pio 82 GPIO_ACTIVE_LOW>;
  65                 };
  66
  67                 led_system: system_blue {
  68                         label = "blue:system";
  69                         gpios = <&pio 81 GPIO_ACTIVE_LOW>;
  70                         default-state = "on";
  71                 };
  72         };
  73
  74         memory {
  75                 reg = <0 0x40000000 0 0x40000000>;
  76         };
  77 };
  78
  79 &eth {
  80         status = "okay";
  81
  82         pinctrl-names = "default";
  83         pinctrl-0 = <&eth_pins>;
  84
  85         gmac0: mac@0 {
  86                 compatible = "mediatek,eth-mac";
  87                 reg = <0>;
  88                 phy-connection-type = "2500base-x";
  89                 fixed-link {
  90                         speed = <2500>;
  91                         full-duplex;
  92                         pause;
  93                 };
  94         };
  95
  96         mdio: mdio-bus {
  97                 #address-cells = <1>;
  98                 #size-cells = <0>;
  99
 100                 switch@0 {
 101                         compatible = "mediatek,mt7531";
 102                         reg = <0>;
 103                         reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
 104                         interrupt-controller;
 105                         #interrupt-cells = <2>;
 106                         interrupt-parent = <&pio>;
 107                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 108
 109                         ports {
 110                                 #address-cells = <1>;
 111                                 #size-cells = <0>;
 112
 113                                 port@0 {
 114                                         reg = <0>;
 115                                         label = "lan1";
 116                                 };
 117
 118                                 port@1 {
 119                                         reg = <1>;
 120                                         label = "lan2";
 121                                 };
 122
 123                                 port@2 {
 124                                         reg = <2>;
 125                                         label = "lan3";
 126                                 };
 127
 128                                 port@3 {
 129                                         reg = <3>;
 130                                         label = "lan4";
 131                                 };
 132
 133                                 wan: port@4 {
 134                                         reg = <4>;
 135                                         label = "wan";
 136                                 };
 137
 138                                 port@6 {
 139                                         reg = <6>;
 140                                         label = "cpu";
 141                                         ethernet = <&gmac0>;
 142                                         phy-mode = "2500base-x";
 143
 144                                         fixed-link {
 145                                                 speed = <2500>;
 146                                                 full-duplex;
 147                                                 pause;
 148                                         };
 149                                 };
 150                         };
 151                 };
 152         };
 153 };
 154
 155 &pcie0 {
 156         status = "okay";
 157
 158         pinctrl-names = "default";
 159         pinctrl-0 = <&pcie0_pins>;
 160 };
 161
 162 &pio {
 163         epa_elna_pins: epa-elna-pins {
 164                 mux {
 165                         function = "antsel";
 166                         groups = "antsel0", "antsel1", "antsel2", "antsel3",
 167                                 "antsel4", "antsel5", "antsel6", "antsel7",
 168                                 "antsel8", "antsel9", "antsel12", "antsel13",
 169                                 "antsel14", "antsel15", "antsel16", "antsel17";
 170                 };
 171         };
 172
 173         eth_pins: eth-pins {
 174                 mux {
 175                         function = "eth";
 176                         groups = "mdc_mdio", "rgmii_via_gmac2";
 177                 };
 178         };
 179
 180         pcie0_pins: pcie0-pins {
 181                 mux {
 182                         function = "pcie";
 183                         groups = "pcie0_pad_perst",
 184                                  "pcie0_0_waken",
 185                                  "pcie0_0_clkreq";
 186                 };
 187         };
 188
 189         pmic_bus_pins: pmic-bus-pins {
 190                 mux {
 191                         function = "pmic";
 192                         groups = "pmic_bus";
 193                 };
 194         };
 195
 196         spi_nor_pins: spi-nor-pins {
 197                 mux {
 198                         function = "flash";
 199                         groups = "spi_nor";
 200                 };
 201         };
 202
 203         uart0_pins: uart0-pins {
 204                 mux {
 205                         function = "uart";
 206                         groups = "uart0_0_tx_rx";
 207                 };
 208         };
 209
 210         watchdog_pins: watchdog-pins {
 211                 mux {
 212                         function = "watchdog";
 213                         groups = "watchdog";
 214                 };
 215         };
 216 };
 217
 218 &pwrap {
 219         status = "okay";
 220
 221         pinctrl-names = "default";
 222         pinctrl-0 = <&pmic_bus_pins>;
 223 };
 224
 225 &rtc {
 226         status = "disabled";
 227 };
 228
 229 &uart0 {
 230         status = "okay";
 231
 232         pinctrl-names = "default";
 233         pinctrl-0 = <&uart0_pins>;
 234 };
 235
 236 &watchdog {
 237         status = "okay";
 238
 239         pinctrl-names = "default";
 240         pinctrl-0 = <&watchdog_pins>;
 241 };