ipq806x: add missing wakeup-source for gpio keys
[openwrt/staging/zorun.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8068-ecw5410.dts
1 #include "qcom-ipq8064-v2.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/soc/qcom,tcsr.h>
5
6 / {
7 model = "Edgecore ECW5410";
8 compatible = "edgecore,ecw5410", "qcom,ipq8064";
9
10 reserved-memory {
11 nss@40000000 {
12 reg = <0x40000000 0x1000000>;
13 no-map;
14 };
15
16 smem: smem@41000000 {
17 reg = <0x41000000 0x200000>;
18 no-map;
19 };
20
21 wifi_dump@44000000 {
22 reg = <0x44000000 0x600000>;
23 no-map;
24 };
25 };
26
27 cpus {
28 idle-states {
29 CPU_SPC: spc {
30 status = "disabled";
31 };
32 };
33 };
34
35 aliases {
36 serial1 = &gsbi1_serial;
37 mdio-gpio0 = &mdio0;
38 ethernet0 = &gmac3;
39 ethernet1 = &gmac2;
40
41 led-boot = &led_power_green;
42 led-failsafe = &led_power_red;
43 led-running = &led_power_green;
44 led-upgrade = &led_power_green;
45 };
46
47 chosen {
48 bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
49 };
50
51 keys {
52 compatible = "gpio-keys";
53 pinctrl-0 = <&button_pins>;
54 pinctrl-names = "default";
55
56 reset {
57 label = "reset";
58 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_RESTART>;
60 debounce-interval = <60>;
61 wakeup-source;
62 };
63 };
64
65 leds {
66 compatible = "gpio-leds";
67 pinctrl-0 = <&led_pins>;
68 pinctrl-names = "default";
69
70 led_power_green: power_green {
71 label = "green:power";
72 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
73 };
74
75 wlan2g_green {
76 label = "green:wlan2g";
77 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
78 };
79
80 wlan2g_yellow {
81 label = "yellow:wlan2g";
82 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
83 };
84
85 wlan5g_green {
86 label = "green:wlan5g";
87 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
88 };
89
90 led_power_red: power_red {
91 label = "red:power";
92 gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
93 };
94
95 wlan5g_yellow {
96 label = "yellow:wlan5g";
97 gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
98 };
99 };
100 };
101
102
103 &qcom_pinmux {
104 spi_pins: spi_pins {
105 mux {
106 pins = "gpio18", "gpio19";
107 function = "gsbi5";
108 drive-strength = <10>;
109 bias-pull-down;
110 };
111
112 clk {
113 pins = "gpio21";
114 function = "gsbi5";
115 drive-strength = <12>;
116 bias-pull-down;
117 };
118
119 cs {
120 pins = "gpio20";
121 function = "gpio";
122 drive-strength = <10>;
123 bias-pull-up;
124 };
125 };
126
127 led_pins: led_pins {
128 mux {
129 pins = "gpio16", "gpio23", "gpio24", "gpio26",
130 "gpio28", "gpio59";
131 function = "gpio";
132 drive-strength = <2>;
133 bias-pull-up;
134 };
135 };
136
137 button_pins: button_pins {
138 mux {
139 pins = "gpio25";
140 function = "gpio";
141 drive-strength = <2>;
142 bias-pull-up;
143 };
144 };
145
146 uart1_pins: uart1_pins {
147 mux {
148 pins = "gpio51", "gpio52", "gpio53", "gpio54";
149 function = "gsbi1";
150 drive-strength = <12>;
151 bias-none;
152 };
153 };
154 };
155
156 &gsbi1 {
157 qcom,mode = <GSBI_PROT_UART_W_FC>;
158 status = "okay";
159
160 serial@12450000 {
161 status = "okay";
162
163 pinctrl-0 = <&uart1_pins>;
164 pinctrl-names = "default";
165 };
166 };
167
168 &gsbi5 {
169 qcom,mode = <GSBI_PROT_SPI>;
170 status = "okay";
171
172 spi4: spi@1a280000 {
173 status = "okay";
174 spi-max-frequency = <50000000>;
175
176 pinctrl-0 = <&spi_pins>;
177 pinctrl-names = "default";
178
179 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
180
181 m25p80@0 {
182 compatible = "jedec,spi-nor";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 spi-max-frequency = <50000000>;
186 reg = <0>;
187
188 partitions {
189 compatible = "qcom,smem-part";
190 };
191 };
192 };
193 };
194
195 &hs_phy_0 { /* USB3 port 0 HS phy */
196 status = "okay";
197 };
198
199 &hs_phy_1 { /* USB3 port 1 HS phy */
200 status = "okay";
201 };
202
203 &ss_phy_0 { /* USB3 port 0 SS phy */
204 status = "okay";
205 };
206
207 &ss_phy_1 { /* USB3 port 1 SS phy */
208 status = "okay";
209 };
210
211 &usb3_0 {
212 status = "okay";
213 };
214
215 &usb3_1 {
216 status = "okay";
217 };
218
219 &pcie1 {
220 status = "okay";
221
222 /delete-property/ pinctrl-0;
223 /delete-property/ pinctrl-names;
224 /delete-property/ perst-gpios;
225
226 bridge@0,0 {
227 reg = <0x00000000 0 0 0 0>;
228 #address-cells = <3>;
229 #size-cells = <2>;
230 ranges;
231
232 wifi@1,0 {
233 compatible = "qcom,ath10k";
234 status = "okay";
235 reg = <0x00010000 0 0 0 0>;
236 qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
237 };
238 };
239 };
240
241 &pcie2 {
242 status = "okay";
243
244 /delete-property/ pinctrl-0;
245 /delete-property/ pinctrl-names;
246 /delete-property/ perst-gpios;
247
248 bridge@0,0 {
249 reg = <0x00000000 0 0 0 0>;
250 #address-cells = <3>;
251 #size-cells = <2>;
252 ranges;
253
254 wifi@1,0 {
255 compatible = "qcom,ath10k";
256 status = "okay";
257 reg = <0x00010000 0 0 0 0>;
258 qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
259 };
260 };
261 };
262
263 &nand_controller {
264 status = "okay";
265
266 pinctrl-0 = <&nand_pins>;
267 pinctrl-names = "default";
268
269 nand@0 {
270 compatible = "qcom,nandcs";
271
272 reg = <0>;
273
274 nand-ecc-strength = <4>;
275 nand-bus-width = <8>;
276 nand-ecc-step-size = <512>;
277
278 partitions {
279 compatible = "fixed-partitions";
280 #address-cells = <1>;
281 #size-cells = <1>;
282
283 rootfs1@0 {
284 label = "rootfs1";
285 reg = <0x0000000 0x4000000>;
286 };
287
288 rootfs2@4000000 {
289 label = "rootfs2";
290 reg = <0x4000000 0x4000000>;
291 };
292 };
293 };
294 };
295
296 &soc {
297 mdio1: mdio {
298 compatible = "virtual,mdio-gpio";
299 #address-cells = <1>;
300 #size-cells = <0>;
301
302 status = "okay";
303
304 pinctrl-0 = <&mdio0_pins>;
305 pinctrl-names = "default";
306
307 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
308
309 phy0: ethernet-phy@0 {
310 reg = <0>;
311 };
312
313 phy1: ethernet-phy@1 {
314 reg = <1>;
315 };
316 };
317 };
318
319 &gmac2 {
320 status = "okay";
321
322 qcom,id = <2>;
323 mdiobus = <&mdio0>;
324
325 phy-mode = "sgmii";
326 phy-handle = <&phy1>;
327 };
328
329 &gmac3 {
330 status = "okay";
331
332 qcom,id = <3>;
333 mdiobus = <&mdio1>;
334
335 phy-mode = "sgmii";
336 phy-handle = <&phy0>;
337 };
338
339 &adm_dma {
340 status = "okay";
341 };