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[openwrt/staging/zorun.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8065-r7800.dts
1 #include "qcom-ipq8065.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4S R7800";
7 compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 rsvd@5fe00000 {
16 reg = <0x5fe00000 0x200000>;
17 reusable;
18 };
19 };
20
21 aliases {
22 mdio-gpio0 = &mdio0;
23
24 led-boot = &power_white;
25 led-failsafe = &power_amber;
26 led-running = &power_white;
27 led-upgrade = &power_amber;
28 label-mac-device = &gmac2;
29 };
30
31 keys {
32 compatible = "gpio-keys";
33 pinctrl-0 = <&button_pins>;
34 pinctrl-names = "default";
35
36 wifi {
37 label = "wifi";
38 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
39 linux,code = <KEY_RFKILL>;
40 debounce-interval = <60>;
41 wakeup-source;
42 };
43
44 reset {
45 label = "reset";
46 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
47 linux,code = <KEY_RESTART>;
48 debounce-interval = <60>;
49 wakeup-source;
50 };
51
52 wps {
53 label = "wps";
54 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
55 linux,code = <KEY_WPS_BUTTON>;
56 debounce-interval = <60>;
57 wakeup-source;
58 };
59 };
60
61 leds {
62 compatible = "gpio-leds";
63 pinctrl-0 = <&led_pins>;
64 pinctrl-names = "default";
65
66 power_white: power_white {
67 label = "white:power";
68 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
69 default-state = "keep";
70 };
71
72 power_amber: power_amber {
73 label = "amber:power";
74 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
75 };
76
77 wan_white {
78 label = "white:wan";
79 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
80 };
81
82 wan_amber {
83 label = "amber:wan";
84 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
85 };
86
87 usb1 {
88 label = "white:usb1";
89 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
90 };
91
92 usb2 {
93 label = "white:usb2";
94 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
95 };
96
97 esata {
98 label = "white:esata";
99 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
100 };
101
102 wifi {
103 label = "white:wifi";
104 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
105 };
106
107 wps {
108 label = "white:wps";
109 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
110 };
111 };
112 };
113
114 &qcom_pinmux {
115 button_pins: button_pins {
116 mux {
117 pins = "gpio6", "gpio54", "gpio65";
118 function = "gpio";
119 drive-strength = <2>;
120 bias-pull-up;
121 };
122 };
123
124 led_pins: led_pins {
125 mux {
126 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
127 "gpio24","gpio26", "gpio53", "gpio64";
128 function = "gpio";
129 drive-strength = <2>;
130 bias-pull-down;
131 };
132 };
133
134 mdio0_pins: mdio0_pins {
135 clk {
136 pins = "gpio1";
137 input-disable;
138 };
139 };
140
141 rgmii2_pins: rgmii2_pins {
142 tx {
143 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
144 input-disable;
145 };
146 };
147
148 spi_pins: spi_pins {
149 mux {
150 pins = "gpio18", "gpio19", "gpio21";
151 function = "gsbi5";
152 bias-pull-down;
153 };
154
155 data {
156 pins = "gpio18", "gpio19";
157 drive-strength = <10>;
158 };
159
160 cs {
161 pins = "gpio20";
162 drive-strength = <10>;
163 bias-pull-up;
164 };
165
166 clk {
167 pins = "gpio21";
168 drive-strength = <12>;
169 };
170 };
171
172 spi6_pins: spi6_pins {
173 mux {
174 pins = "gpio55", "gpio56", "gpio58";
175 function = "gsbi6";
176 bias-pull-down;
177 };
178
179 mosi {
180 pins = "gpio55";
181 drive-strength = <12>;
182 };
183
184 miso {
185 pins = "gpio56";
186 drive-strength = <14>;
187 };
188
189 cs {
190 pins = "gpio57";
191 drive-strength = <12>;
192 bias-pull-up;
193 };
194
195 clk {
196 pins = "gpio58";
197 drive-strength = <12>;
198 };
199
200 reset {
201 pins = "gpio33";
202 drive-strength = <10>;
203 bias-pull-down;
204 output-high;
205 };
206 };
207
208 usb0_pwr_en_pins: usb0_pwr_en_pins {
209 mux {
210 pins = "gpio15";
211 function = "gpio";
212 drive-strength = <12>;
213 bias-pull-down;
214 output-high;
215 };
216 };
217
218 usb1_pwr_en_pins: usb1_pwr_en_pins {
219 mux {
220 pins = "gpio16", "gpio68";
221 function = "gpio";
222 drive-strength = <12>;
223 bias-pull-down;
224 output-high;
225 };
226 };
227 };
228
229 &nand_controller {
230 status = "okay";
231
232 pinctrl-0 = <&nand_pins>;
233 pinctrl-names = "default";
234
235 nand@0 {
236 reg = <0>;
237 compatible = "qcom,nandcs";
238
239 nand-ecc-strength = <4>;
240 nand-bus-width = <8>;
241 nand-ecc-step-size = <512>;
242
243 partitions {
244 compatible = "fixed-partitions";
245 #address-cells = <1>;
246 #size-cells = <1>;
247
248 qcadata@0 {
249 label = "qcadata";
250 reg = <0x0000000 0x0c80000>;
251 read-only;
252 };
253
254 APPSBL@c80000 {
255 label = "APPSBL";
256 reg = <0x0c80000 0x0500000>;
257 read-only;
258 };
259
260 APPSBLENV@1180000 {
261 label = "APPSBLENV";
262 reg = <0x1180000 0x0080000>;
263 read-only;
264 };
265
266 art: art@1200000 {
267 label = "art";
268 reg = <0x1200000 0x0140000>;
269 read-only;
270 };
271
272 artbak: art@1340000 {
273 label = "artbak";
274 reg = <0x1340000 0x0140000>;
275 read-only;
276 };
277
278 kernel@1480000 {
279 label = "kernel";
280 reg = <0x1480000 0x0400000>;
281 };
282
283 ubi@1880000 {
284 label = "ubi";
285 reg = <0x1880000 0x6080000>;
286 };
287
288 reserve@7900000 {
289 label = "reserve";
290 reg = <0x7900000 0x0700000>;
291 read-only;
292 };
293 };
294 };
295 };
296
297 &mdio0 {
298 status = "okay";
299
300 pinctrl-0 = <&mdio0_pins>;
301 pinctrl-names = "default";
302
303 phy0: ethernet-phy@0 {
304 reg = <0>;
305 qca,ar8327-initvals = <
306 0x00004 0x7600000 /* PAD0_MODE */
307 0x00008 0x1000000 /* PAD5_MODE */
308 0x0000c 0x80 /* PAD6_MODE */
309 0x000e4 0xaa545 /* MAC_POWER_SEL */
310 0x000e0 0xc74164de /* SGMII_CTRL */
311 0x0007c 0x4e /* PORT0_STATUS */
312 0x00094 0x4e /* PORT6_STATUS */
313 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
314 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
315 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
316 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
317 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
318 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
319 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
320 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
321 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
322 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
323 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
324 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
325 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
326 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
327 >;
328 qca,ar8327-vlans = <
329 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
330 0x2 0x21 /* VLAN2 Ports 0/5 */
331 >;
332 };
333
334 phy4: ethernet-phy@4 {
335 reg = <4>;
336 qca,ar8327-initvals = <
337 0x000e4 0x6a545 /* MAC_POWER_SEL */
338 0x0000c 0x80 /* PAD6_MODE */
339 >;
340 };
341 };
342
343 &gmac1 {
344 status = "okay";
345 phy-mode = "rgmii";
346 qcom,id = <1>;
347 qcom,phy_mdio_addr = <4>;
348 qcom,poll_required = <0>;
349 qcom,rgmii_delay = <1>;
350 qcom,phy_mii_type = <0>;
351 qcom,emulation = <0>;
352 qcom,irq = <255>;
353 mdiobus = <&mdio0>;
354
355 pinctrl-0 = <&rgmii2_pins>;
356 pinctrl-names = "default";
357
358 mtd-mac-address = <&art 6>;
359
360 fixed-link {
361 speed = <1000>;
362 full-duplex;
363 };
364 };
365
366 &gmac2 {
367 status = "okay";
368 phy-mode = "sgmii";
369 qcom,id = <2>;
370 qcom,phy_mdio_addr = <0>; /* none */
371 qcom,poll_required = <0>; /* no polling */
372 qcom,rgmii_delay = <0>;
373 qcom,phy_mii_type = <1>;
374 qcom,emulation = <0>;
375 qcom,irq = <258>;
376 mdiobus = <&mdio0>;
377
378 mtd-mac-address = <&art 0>;
379
380 fixed-link {
381 speed = <1000>;
382 full-duplex;
383 };
384 };
385
386 &adm_dma {
387 status = "okay";
388 };
389
390 &sata_phy {
391 status = "okay";
392 };
393
394 &sata {
395 status = "okay";
396 };
397
398 &usb3_0 {
399 status = "okay";
400
401 pinctrl-0 = <&usb0_pwr_en_pins>;
402 pinctrl-names = "default";
403 };
404
405 &usb3_1 {
406 status = "okay";
407
408 pinctrl-0 = <&usb1_pwr_en_pins>;
409 pinctrl-names = "default";
410 };
411
412 &pcie0 {
413 status = "okay";
414
415 bridge@0,0 {
416 reg = <0x00000000 0 0 0 0>;
417 #address-cells = <3>;
418 #size-cells = <2>;
419 ranges;
420
421 wifi@1,0 {
422 compatible = "pci168c,0046";
423 reg = <0x00010000 0 0 0 0>;
424
425 mtd-mac-address = <&art 6>;
426 mtd-mac-address-increment = <(1)>;
427 };
428 };
429 };
430
431 &pcie1 {
432 status = "okay";
433 max-link-speed = <1>;
434
435 bridge@0,0 {
436 reg = <0x00000000 0 0 0 0>;
437 #address-cells = <3>;
438 #size-cells = <2>;
439 ranges;
440
441 wifi@1,0 {
442 compatible = "pci168c,0046";
443 reg = <0x00010000 0 0 0 0>;
444
445 mtd-mac-address = <&art 6>;
446 mtd-mac-address-increment = <(2)>;
447 };
448 };
449 };
Staging tree of Baptiste Jonglez