ipq806x: set boot layout for nandc compatible
[openwrt/staging/zorun.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-d7800.dts
1 #include "qcom-ipq8064-v2.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 D7800";
7 compatible = "netgear,d7800", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0xe000000>;
11 device_type = "memory";
12 };
13
14 aliases {
15 mdio-gpio0 = &mdio0;
16
17 led-boot = &power_white;
18 led-failsafe = &power_amber;
19 led-running = &power_white;
20 led-upgrade = &power_amber;
21 };
22
23 chosen {
24 bootargs = "rootfstype=squashfs noinitrd";
25 };
26
27 keys {
28 compatible = "gpio-keys";
29 pinctrl-0 = <&button_pins>;
30 pinctrl-names = "default";
31
32 wifi {
33 label = "wifi";
34 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_RFKILL>;
36 };
37
38 reset {
39 label = "reset";
40 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
41 linux,code = <KEY_RESTART>;
42 };
43
44 wps {
45 label = "wps";
46 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
47 linux,code = <KEY_WPS_BUTTON>;
48 };
49 };
50
51 leds {
52 compatible = "gpio-leds";
53 pinctrl-0 = <&led_pins>;
54 pinctrl-names = "default";
55
56 usb1 {
57 label = "white:usb1";
58 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
59 };
60
61 usb2 {
62 label = "white:usb2";
63 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
64 };
65
66 power_amber: power_amber {
67 label = "amber:power";
68 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
69 };
70
71 wan_white {
72 label = "white:wan";
73 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
74 };
75
76 wan_amber {
77 label = "amber:wan";
78 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
79 };
80
81 wps {
82 label = "white:wps";
83 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
84 };
85
86 esata {
87 label = "white:esata";
88 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
89 };
90
91 power_white: power_white {
92 label = "white:power";
93 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
94 default-state = "keep";
95 };
96
97 wifi {
98 label = "white:wifi";
99 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
100 };
101 };
102 };
103
104 &qcom_pinmux {
105 button_pins: button_pins {
106 mux {
107 pins = "gpio6", "gpio54", "gpio65";
108 function = "gpio";
109 drive-strength = <2>;
110 bias-pull-up;
111 };
112 };
113
114 led_pins: led_pins {
115 mux {
116 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
117 "gpio24","gpio26", "gpio53", "gpio64";
118 function = "gpio";
119 drive-strength = <2>;
120 bias-pull-up;
121 };
122 };
123
124 usb0_pwr_en_pins: usb0_pwr_en_pins {
125 mux {
126 pins = "gpio15";
127 function = "gpio";
128 drive-strength = <12>;
129 bias-pull-down;
130 output-high;
131 };
132 };
133
134 usb1_pwr_en_pins: usb1_pwr_en_pins {
135 mux {
136 pins = "gpio16", "gpio68";
137 function = "gpio";
138 drive-strength = <12>;
139 bias-pull-down;
140 output-high;
141 };
142 };
143 };
144
145 &sata_phy {
146 status = "okay";
147 };
148
149 &sata {
150 status = "okay";
151 };
152
153 &usb3_0 {
154 status = "okay";
155
156 pinctrl-0 = <&usb0_pwr_en_pins>;
157 pinctrl-names = "default";
158 };
159
160 &usb3_1 {
161 status = "okay";
162
163 pinctrl-0 = <&usb1_pwr_en_pins>;
164 pinctrl-names = "default";
165 };
166
167 &pcie0 {
168 status = "okay";
169 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
170 pinctrl-0 = <&pcie0_pins>;
171 pinctrl-names = "default";
172 };
173
174 &pcie1 {
175 status = "okay";
176 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
177 pinctrl-0 = <&pcie1_pins>;
178 pinctrl-names = "default";
179 max-link-speed = <1>;
180 };
181
182 &nand_controller {
183 status = "okay";
184
185 pinctrl-0 = <&nand_pins>;
186 pinctrl-names = "default";
187
188 #address-cells = <1>;
189 #size-cells = <0>;
190
191 nand@0 {
192 reg = <0>;
193 compatible = "qcom,nandcs";
194
195 nand-ecc-strength = <4>;
196 nand-bus-width = <8>;
197 nand-ecc-step-size = <512>;
198
199 nand-is-boot-medium;
200 qcom,boot_pages_size = <0x1180000>;
201
202 partitions {
203 compatible = "fixed-partitions";
204 #address-cells = <1>;
205 #size-cells = <1>;
206
207 qcadata@0 {
208 label = "qcadata";
209 reg = <0x0000000 0x0c80000>;
210 read-only;
211 };
212
213 APPSBL@c80000 {
214 label = "APPSBL";
215 reg = <0x0c80000 0x0500000>;
216 read-only;
217 };
218
219 APPSBLENV@1180000 {
220 label = "APPSBLENV";
221 reg = <0x1180000 0x0080000>;
222 read-only;
223 };
224
225 art: art@1200000 {
226 label = "art";
227 reg = <0x1200000 0x0140000>;
228 read-only;
229 };
230
231 artbak: art@1340000 {
232 label = "artbak";
233 reg = <0x1340000 0x0140000>;
234 read-only;
235 };
236
237 kernel@1480000 {
238 label = "kernel";
239 reg = <0x1480000 0x0400000>;
240 };
241
242 ubi@1880000 {
243 label = "ubi";
244 reg = <0x1880000 0x1C00000>;
245 };
246
247 netgear@3480000 {
248 label = "netgear";
249 reg = <0x3480000 0x4480000>;
250 read-only;
251 };
252
253 reserve@7900000 {
254 label = "reserve";
255 reg = <0x7900000 0x0700000>;
256 read-only;
257 };
258 };
259 };
260 };
261
262 &mdio0 {
263 status = "okay";
264
265 pinctrl-0 = <&mdio0_pins>;
266 pinctrl-names = "default";
267
268 phy0: ethernet-phy@0 {
269 reg = <0>;
270 qca,ar8327-initvals = <
271 0x00004 0x7600000 /* PAD0_MODE */
272 0x00008 0x1000000 /* PAD5_MODE */
273 0x0000c 0x80 /* PAD6_MODE */
274 0x000e4 0x6a545 /* MAC_POWER_SEL */
275 0x000e0 0xc74164de /* SGMII_CTRL */
276 0x0007c 0x4e /* PORT0_STATUS */
277 0x00094 0x4e /* PORT6_STATUS */
278 >;
279 };
280
281 phy4: ethernet-phy@4 {
282 reg = <4>;
283 };
284 };
285
286 &gmac1 {
287 status = "okay";
288 phy-mode = "rgmii";
289 qcom,id = <1>;
290
291 pinctrl-0 = <&rgmii2_pins>;
292 pinctrl-names = "default";
293
294 mtd-mac-address = <&art 6>;
295
296 fixed-link {
297 speed = <1000>;
298 full-duplex;
299 };
300 };
301
302 &gmac2 {
303 status = "okay";
304 phy-mode = "sgmii";
305 qcom,id = <2>;
306
307 mtd-mac-address = <&art 0>;
308
309 fixed-link {
310 speed = <1000>;
311 full-duplex;
312 };
313 };
314
315 &adm_dma {
316 status = "okay";
317 };