target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4019-x1pro.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "qcom-ipq4019-x1pro.dtsi"
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         model = "Telco X1 Pro";
  11         compatible = "tel,x1pro","qcom,ipq4019";
  12 };
  13
  14 &blsp1_spi1 {
  15         pinctrl-0 = <&spi_0_pins>;
  16         pinctrl-names = "default";
  17         status = "okay";
  18         cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  19
  20         flash@0 {
  21                 reg = <0>;
  22                 compatible = "jedec,spi-nor";
  23                 spi-max-frequency = <24000000>;
  24                 broken-flash-reset;
  25
  26                 partitions {
  27                         compatible = "fixed-partitions";
  28                         #address-cells = <1>;
  29                         #size-cells = <1>;
  30
  31                         partition@0 {
  32                                 label = "0:SBL1";
  33                                 reg = <0x0 0x40000>;
  34                                 read-only;
  35                         };
  36                         partition@40000 {
  37                                 label = "0:MIBIB";
  38                                 reg = <0x40000 0x20000>;
  39                                 read-only;
  40                         };
  41                         partition@60000 {
  42                                 label = "0:QSEE";
  43                                 reg = <0x60000 0x60000>;
  44                                 read-only;
  45                         };
  46                         partition@c0000 {
  47                                 label = "0:CDT";
  48                                 reg = <0xc0000 0x10000>;
  49                                 read-only;
  50                         };
  51                         partition@d0000 {
  52                                 label = "0:DDRPARAMS";
  53                                 reg = <0xd0000 0x10000>;
  54                                 read-only;
  55                         };
  56                         partition@e0000 {
  57                                 label = "0:APPSBLENV";
  58                                 reg = <0xe0000 0x10000>;
  59                                 read-only;
  60                         };
  61                         partition@f0000 {
  62                                 label = "0:APPSBL";
  63                                 reg = <0xf0000 0x80000>;
  64                                 read-only;
  65                         };
  66                         art: partition@170000 {
  67                                 label = "0:ART";
  68                                 reg = <0x170000 0x10000>;
  69                                 read-only;
  70
  71                                 nvmem-layout {
  72                                         compatible = "fixed-layout";
  73                                         #address-cells = <1>;
  74                                         #size-cells = <1>;
  75
  76                                         precal_art_1000: precal@1000 {
  77                                                 reg = <0x1000 0x2f20>;
  78                                         };
  79
  80                                         precal_art_5000: precal@5000 {
  81                                                 reg = <0x5000 0x2f20>;
  82                                         };
  83                                 };
  84                         };
  85                         partition@180000 {
  86                                 compatible = "denx,fit";
  87                                 label = "firmware";
  88                                 reg = <0x180000 0x1e80000>;
  89                         };
  90                 };
  91         };
  92 };