ipq40xx: switch default to 6.6
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4018-wr-1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8
9 / {
10 model = "Pakedge WR-1";
11 compatible = "pakedge,wr-1";
12
13 aliases {
14 label-mac-device = &gmac;
15 led-boot = &led_power;
16 led-failsafe = &led_power;
17 led-running = &led_power;
18 led-upgrade = &led_power;
19 };
20
21 keys {
22 compatible = "gpio-keys";
23 pinctrl-0 = <&key_pins>;
24 pinctrl-names = "default";
25
26 reset {
27 label = "reset";
28 gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
29 linux,code = <KEY_RESTART>;
30 };
31 };
32
33 leds {
34 compatible = "gpio-leds";
35 pinctrl-0 = <&led_pins>;
36 pinctrl-names = "default";
37
38 led_power: power {
39 gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
40 color = <LED_COLOR_ID_BLUE>;
41 function = LED_FUNCTION_POWER;
42 };
43
44 wlan2g {
45 gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
46 color = <LED_COLOR_ID_BLUE>;
47 function = LED_FUNCTION_WLAN;
48 linux,default-trigger = "phy0tpt";
49 };
50
51 wlan5g {
52 gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
53 color = <LED_COLOR_ID_BLUE>;
54 function = LED_FUNCTION_WLAN;
55 linux,default-trigger = "phy1tpt";
56 };
57 };
58
59 soc {
60 tcsr@1949000 {
61 compatible = "qcom,tcsr";
62 reg = <0x1949000 0x100>;
63 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
64 };
65
66 tcsr@194b000 {
67 compatible = "qcom,tcsr";
68 reg = <0x194b000 0x100>;
69 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
70 };
71
72 ess_tcsr@1953000 {
73 compatible = "qcom,tcsr";
74 reg = <0x1953000 0x1000>;
75 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
76 };
77
78 tcsr@1957000 {
79 compatible = "qcom,tcsr";
80 reg = <0x1957000 0x100>;
81 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
82 };
83 };
84 };
85
86 &blsp_dma {
87 status = "okay";
88 };
89
90 &blsp1_spi1 {
91 status = "okay";
92
93 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
94 pinctrl-0 = <&spi_0_pins>;
95 pinctrl-names = "default";
96
97 flash@0 {
98 compatible = "jedec,spi-nor";
99 reg = <0>;
100 spi-max-frequency = <24000000>;
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 partition@0 {
108 label = "0:SBL1";
109 reg = <0x0000000 0x0040000>;
110 read-only;
111 };
112
113 partition@40000 {
114 label = "0:MIBIB";
115 reg = <0x0040000 0x0020000>;
116 read-only;
117 };
118
119 partition@60000 {
120 label = "0:QSEE";
121 reg = <0x0060000 0x0060000>;
122 read-only;
123 };
124
125 partition@c0000 {
126 label = "0:CDT";
127 reg = <0x00c0000 0x0010000>;
128 read-only;
129 };
130
131 partition@d0000 {
132 label = "0:DDRPARAMS";
133 reg = <0x00d0000 0x0010000>;
134 read-only;
135 };
136
137 partition@e0000 {
138 label = "0:APPSBLENV";
139 reg = <0x00e0000 0x0010000>;
140 read-only;
141 };
142
143 partition@f0000 {
144 label = "0:APPSBL";
145 reg = <0x00f0000 0x0080000>;
146 read-only;
147 };
148
149 partition@170000 {
150 label = "0:ART";
151 reg = <0x0170000 0x0010000>;
152 read-only;
153 };
154
155 partition@180000 {
156 label = "firmware";
157 reg = <0x0180000 0x1e80000>;
158 };
159 };
160 };
161 };
162
163 &blsp1_uart1 {
164 status = "okay";
165
166 pinctrl-0 = <&serial_pins>;
167 pinctrl-names = "default";
168 };
169
170 &crypto {
171 status = "okay";
172 };
173
174 &cryptobam {
175 status = "okay";
176 };
177
178 &gmac {
179 status = "okay";
180 };
181
182 &mdio {
183 status = "okay";
184 };
185
186 &prng {
187 status = "okay";
188 };
189
190 &switch {
191 status = "okay";
192 };
193
194 &swport1 {
195 status = "okay";
196
197 label = "lan4";
198 };
199
200 &swport2 {
201 status = "okay";
202
203 label = "lan3";
204 };
205
206 &swport3 {
207 status = "okay";
208
209 label = "lan2";
210 };
211
212 &swport4 {
213 status = "okay";
214
215 label = "lan1";
216 };
217
218 &swport5 {
219 status = "okay";
220 };
221
222 &tlmm {
223 key_pins: key_pinmux {
224 mux {
225 function = "gpio";
226 pins = "gpio59";
227 bias-pull-up;
228 };
229 };
230
231 led_pins: led_pinmux {
232 mux {
233 function = "gpio";
234 pins = "gpio0", "gpio1", "gpio2";
235 bias-none;
236 drive-strength = <2>;
237 output-low;
238 };
239 };
240
241 serial_pins: serial_pinmux {
242 mux {
243 function = "blsp_uart0";
244 pins = "gpio60", "gpio61";
245 bias-disable;
246 };
247 };
248
249 spi_0_pins: spi_0_pinmux {
250 mux {
251 function = "blsp_spi0";
252 pins = "gpio55", "gpio56", "gpio57";
253 bias-disable;
254 drive-strength = <12>;
255 };
256
257 mux_cs {
258 function = "gpio";
259 pins = "gpio54";
260 bias-disable;
261 drive-strength = <2>;
262 output-high;
263 };
264 };
265 };
266
267 &usb2 {
268 status = "okay";
269 };
270
271 &usb2_hs_phy {
272 status = "okay";
273 };
274
275 &watchdog {
276 status = "okay";
277 };
278
279 &wifi0 {
280 status = "okay";
281
282 qcom,ath10k-calibration-variant = "Pakedge-WR-1";
283 };
284
285 &wifi1 {
286 status = "okay";
287
288 qcom,ath10k-calibration-variant = "Pakedge-WR-1";
289 };