target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-mf287pro.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
   3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
   4 // Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
   5
   6 #include "qcom-ipq4018-mf287_common.dtsi"
   7
   8 / {
   9         model = "ZTE MF287Pro";
  10         compatible = "zte,mf287pro";
  11
  12         regulator-usb-vbus {
  13                 compatible = "regulator-fixed";
  14                 regulator-name = "USB_VBUS";
  15                 regulator-min-microvolt = <5000000>;
  16                 regulator-max-microvolt = <5000000>;
  17                 regulator-always-on;
  18                 regulator-boot-on;
  19                 gpio = <&tlmm 25 GPIO_ACTIVE_LOW>;
  20         };
  21 };
  22
  23 &gpio_modem_reset {
  24         gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
  25 };
  26
  27 &key_reset {
  28         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  29 };
  30
  31 &key_wps {
  32         gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
  33 };
  34
  35 &led_status {
  36         gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
  37 };
  38
  39 &mdio {
  40         status = "okay";
  41         pinctrl-0 = <&mdio_pins>;
  42         pinctrl-names = "default";
  43         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  44         reset-delay-us = <2000>;
  45 };
  46
  47 &blsp1_spi1 {
  48         pinctrl-0 = <&spi_0_pins>;
  49         pinctrl-names = "default";
  50         status = "okay";
  51         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
  52                                 <&tlmm 54 GPIO_ACTIVE_HIGH>;
  53
  54         flash@0 {
  55                 compatible = "jedec,spi-nor";
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58                 reg = <0>;
  59                 spi-max-frequency = <24000000>;
  60
  61                 partitions {
  62                         compatible = "fixed-partitions";
  63                         #address-cells = <1>;
  64                         #size-cells = <1>;
  65
  66                         partition@0 {
  67                                 label = "0:SBL1";
  68                                 reg = <0x0 0x40000>;
  69                                 read-only;
  70                         };
  71
  72                         partition@40000 {
  73                                 label = "0:MIBIB";
  74                                 reg = <0x40000 0x20000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@60000 {
  79                                 label = "0:QSEE";
  80                                 reg = <0x60000 0x60000>;
  81                                 read-only;
  82                         };
  83
  84                         partition@c0000 {
  85                                 label = "0:CDT";
  86                                 reg = <0xc0000 0x10000>;
  87                                 read-only;
  88                         };
  89
  90                         partition@d0000 {
  91                                 label = "0:DDRPARAMS";
  92                                 reg = <0xd0000 0x10000>;
  93                                 read-only;
  94                         };
  95
  96                         partition@e0000 {
  97                                 label = "0:APPSBLENV";
  98                                 reg = <0xe0000 0x10000>;
  99                                 read-only;
 100                         };
 101
 102                         partition@f0000 {
 103                                 label = "0:APPSBL";
 104                                 reg = <0xf0000 0xc0000>;
 105                                 read-only;
 106                         };
 107
 108                         partition@1b0000 {
 109                                 label = "0:reserved1";
 110                                 reg = <0x1b0000 0x50000>;
 111                                 read-only;
 112                         };
 113                 };
 114         };
 115
 116         spi-nand@1 { /* flash@1 ? */
 117                 compatible = "spi-nand";
 118                 reg = <1>;
 119                 spi-max-frequency = <24000000>;
 120
 121                 partitions {
 122                         compatible = "fixed-partitions";
 123                         #address-cells = <1>;
 124                         #size-cells = <1>;
 125
 126                         partition@0 {
 127                                 label = "fota-flag";
 128                                 reg = <0x0 0xa0000>;
 129                                 read-only;
 130                         };
 131
 132                         partition@a0000 {
 133                                 label = "ART";
 134                                 reg = <0xa0000 0x80000>;
 135                                 read-only;
 136
 137                                 nvmem-layout {
 138                                         compatible = "fixed-layout";
 139                                         #address-cells = <1>;
 140                                         #size-cells = <1>;
 141
 142                                         precal_art_1000: precal@1000 {
 143                                                 reg = <0x1000 0x2f20>;
 144                                         };
 145
 146                                         precal_art_5000: precal@5000 {
 147                                                 reg = <0x5000 0x2f20>;
 148                                         };
 149                                 };
 150                         };
 151
 152                         partition@120000 {
 153                                 label = "mac";
 154                                 reg = <0x120000 0x80000>;
 155                                 read-only;
 156
 157                                 nvmem-layout {
 158                                         compatible = "fixed-layout";
 159                                         #address-cells = <1>;
 160                                         #size-cells = <1>;
 161
 162                                         macaddr_mac_0: macaddr@0 {
 163                                                 compatible = "mac-base";
 164                                                 reg = <0x0 0x6>;
 165                                                 #nvmem-cell-cells = <1>;
 166                                         };
 167                                 };
 168                         };
 169
 170                         partition@1a0000 {
 171                                 label = "reserved2";
 172                                 reg = <0x1a0000 0xc0000>;
 173                         };
 174
 175                         partition@260000 {
 176                                 label = "cfg-param";
 177                                 reg = <0x260000 0x400000>;
 178                                 read-only;
 179                         };
 180
 181                         partition@660000 {
 182                                 label = "log";
 183                                 reg = <0x660000 0x400000>;
 184                         };
 185
 186                         partition@a60000 {
 187                                 label = "oops";
 188                                 reg = <0xa60000 0xa0000>;
 189                         };
 190
 191                         partition@b00000 {
 192                                 label = "reserved3";
 193                                 reg = <0xb00000 0x500000>;
 194                         };
 195
 196                         partition@1000000 {
 197                                 label = "web";
 198                                 reg = <0x1000000 0x800000>;
 199                         };
 200
 201                         partition@1800000 {
 202                                 label = "rootfs";
 203                                 reg = <0x1800000 0x1d00000>;
 204                         };
 205
 206                         partition@3500000 {
 207                                 label = "data";
 208                                 reg = <0x3500000 0x1900000>;
 209                         };
 210
 211                         partition@4e00000 {
 212                                 label = "fota";
 213                                 reg = <0x4e00000 0x3200000>;
 214                         };
 215                 };
 216         };
 217 };
 218
 219 &tlmm {
 220         i2c_0_pins: i2c_0_pinmux {
 221                 mux {
 222                         pins = "gpio20", "gpio21";
 223                         function = "blsp_i2c0";
 224                         bias-disable;
 225                 };
 226         };
 227
 228         mdio_pins: mdio_pinmux {
 229                 mux_1 {
 230                         pins = "gpio6";
 231                         function = "mdio";
 232                         bias-pull-up;
 233                 };
 234
 235                 mux_2 {
 236                         pins = "gpio7";
 237                         function = "mdc";
 238                         bias-pull-up;
 239                 };
 240         };
 241
 242         serial_pins: serial_pinmux {
 243                 mux {
 244                         pins = "gpio16", "gpio17";
 245                         function = "blsp_uart0";
 246                         bias-disable;
 247                 };
 248         };
 249
 250         spi_0_pins: spi_0_pinmux {
 251                 pinmux {
 252                         function = "blsp_spi0";
 253                         pins = "gpio12", "gpio13", "gpio14", "gpio15";
 254                         drive-strength = <12>;
 255                         bias-disable;
 256                 };
 257
 258                 pinmux_cs {
 259                         function = "gpio";
 260                         pins = "gpio12", "gpio54";
 261                         drive-strength = <2>;
 262                         bias-disable;
 263                         output-high;
 264                 };
 265         };
 266 };
 267
 268 /* The MF287Plus and MF287Pro share the same board data file */
 269 &wifi0 {
 270         qcom,ath10k-calibration-variant = "zte,mf287plus";
 271 };
 272
 273 /* The MF287Plus and MF287Pro share the same board data file */
 274 &wifi1{
 275         qcom,ath10k-calibration-variant = "zte,mf287plus";
 276 };