cdb00932175a659cc0752341ec971496e92df367
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4018-gl-a1300.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8
9 / {
10 model = "GL.iNet GL-A1300";
11 compatible = "glinet,gl-a1300", "qcom,ipq4019";
12
13 aliases {
14 led-boot = &led_run;
15 led-failsafe = &led_run;
16 led-running = &led_run;
17 led-upgrade = &led_run;
18 label-mac-device = &swport4;
19 };
20
21 chosen {
22 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
23 };
24
25 soc {
26 tcsr@1949000 {
27 compatible = "qcom,tcsr";
28 reg = <0x1949000 0x100>;
29 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
30 };
31
32 tcsr@194b000 {
33 /* select hostmode */
34 compatible = "qcom,tcsr";
35 reg = <0x194b000 0x100>;
36 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
37 status = "okay";
38 };
39
40 ess_tcsr@1953000 {
41 compatible = "qcom,tcsr";
42 reg = <0x1953000 0x1000>;
43 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
44 };
45
46 tcsr@1957000 {
47 compatible = "qcom,tcsr";
48 reg = <0x1957000 0x100>;
49 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
50 };
51 };
52
53 keys {
54 compatible = "gpio-keys";
55
56 reset {
57 label = "reset";
58 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_RESTART>;
60 };
61
62 switch {
63 label = "switch-button";
64 gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
65 linux,code = <KEY_SETUP>;
66 };
67 };
68
69 leds {
70 compatible = "gpio-leds";
71
72 led_run: blue {
73 function = LED_FUNCTION_STATUS;
74 color = <LED_COLOR_ID_BLUE>;
75 gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
76 };
77
78 white {
79 function = LED_FUNCTION_STATUS;
80 color = <LED_COLOR_ID_WHITE>;
81 gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
82 };
83 };
84
85 gpio_export {
86 compatible = "gpio-export";
87
88 usb {
89 gpio-export,name = "usb_power";
90 gpio-export,output = <1>;
91 gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
92 };
93 };
94 };
95
96 &prng {
97 status = "okay";
98 };
99
100 &mdio {
101 status = "okay";
102 };
103
104 &blsp_dma {
105 status = "okay";
106 };
107
108 &watchdog {
109 status = "okay";
110 };
111
112 &crypto {
113 status = "okay";
114 };
115
116 &cryptobam {
117 status = "okay";
118 };
119
120 &blsp1_spi1 {
121 status = "okay";
122
123 pinctrl-0 = <&spi0_pins>;
124 pinctrl-names = "default";
125 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>;
126
127 flash@0 {
128 compatible = "jedec,spi-nor";
129 reg = <0>;
130 spi-max-frequency = <24000000>;
131
132 partitions {
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
135 #size-cells = <1>;
136
137 partition@0 {
138 label = "SBL1";
139 reg = <0x00000000 0x00040000>;
140 read-only;
141 };
142
143 partition@40000 {
144 label = "MIBIB";
145 reg = <0x00040000 0x00020000>;
146 read-only;
147 };
148
149 partition@60000 {
150 label = "QSEE";
151 reg = <0x00060000 0x00060000>;
152 read-only;
153 };
154
155 partition@c0000 {
156 label = "CDT";
157 reg = <0x000c0000 0x00010000>;
158 read-only;
159 };
160
161 partition@d0000 {
162 label = "DDRPARAMS";
163 reg = <0x000d0000 0x00010000>;
164 read-only;
165 };
166
167 partition@e0000 {
168 label = "APPSBLENV"; /* uboot env*/
169 reg = <0x000e0000 0x00010000>;
170 };
171
172 partition@f0000 {
173 label = "APPSBL"; /* uboot */
174 reg = <0x000f0000 0x00080000>;
175 read-only;
176 };
177
178 partition@170000 {
179 label = "ART";
180 reg = <0x00170000 0x00010000>;
181 read-only;
182
183 nvmem-layout {
184 compatible = "fixed-layout";
185 #address-cells = <1>;
186 #size-cells = <1>;
187
188 macaddr_gmac0: macaddr@0 {
189 compatible = "mac-base";
190 reg = <0x0 0x6>;
191 #nvmem-cell-cells = <1>;
192 };
193
194 macaddr_gmac1: macaddr@6 {
195 reg = <0x6 0x6>;
196 };
197
198 precal_art_1000: precal@1000 {
199 reg = <0x1000 0x2f20>;
200 };
201
202 precal_art_5000: precal@5000 {
203 reg = <0x5000 0x2f20>;
204 };
205 };
206 };
207
208 partition@180000 {
209 label = "log";
210 reg = <0x00180000 0x00020000>;
211 };
212 };
213 };
214
215 spi-nand@1 {
216 compatible = "spi-nand";
217 reg = <1>;
218 spi-max-frequency = <24000000>;
219
220 partitions {
221 compatible = "fixed-partitions";
222 #address-cells = <1>;
223 #size-cells = <1>;
224
225 partition@0 {
226 label = "ubi";
227 reg = <0x00000000 0x08000000>;
228 };
229 };
230 };
231 };
232
233 &blsp1_uart1 {
234 pinctrl-0 = <&serial_pins>;
235 pinctrl-names = "default";
236 status = "okay";
237 };
238
239 &tlmm {
240 serial_pins: serial_pinmux {
241 mux {
242 pins = "gpio60", "gpio61";
243 function = "blsp_uart0";
244 bias-disable;
245 };
246 };
247
248 i2c_0_pins: i2c_0_pinmux {
249 pinmux {
250 pins = "gpio58", "gpio59";
251 function = "blsp_i2c0";
252 bias-disable;
253 };
254 };
255
256 spi0_pins: spi0_pinmux {
257 mux_spi {
258 function = "blsp_spi0";
259 pins = "gpio55", "gpio56", "gpio57";
260 drive-strength = <12>;
261 bias-disable;
262 };
263
264 mux_cs {
265 function = "gpio";
266 pins = "gpio54", "gpio5";
267 drive-strength = <2>;
268 bias-disable;
269 output-high;
270 };
271 };
272 };
273
274 &blsp1_i2c3 {
275 status = "okay";
276 pinctrl-0 = <&i2c_0_pins>;
277 pinctrl-names = "default";
278 };
279
280 &usb2 {
281 status = "okay";
282 };
283
284 &usb3 {
285 status = "okay";
286 };
287
288 &usb2_hs_phy {
289 status = "okay";
290 };
291
292 &usb3_hs_phy {
293 status = "okay";
294 };
295
296 &usb3_ss_phy {
297 status = "okay";
298 };
299
300 &gmac {
301 status = "okay";
302 };
303
304 &switch {
305 status = "okay";
306 };
307
308 &swport3 {
309 status = "okay";
310
311 label = "lan2";
312 nvmem-cell-names = "mac-address";
313 nvmem-cells = <&macaddr_gmac0 2>;
314 };
315
316 &swport4 {
317 status = "okay";
318
319 label = "lan1";
320 nvmem-cell-names = "mac-address";
321 nvmem-cells = <&macaddr_gmac0 0>;
322 };
323
324 &swport5 {
325 status = "okay";
326
327 nvmem-cell-names = "mac-address";
328 nvmem-cells = <&macaddr_gmac1>;
329 };
330
331 &wifi0 {
332 status = "okay";
333 nvmem-cell-names = "pre-calibration";
334 nvmem-cells = <&precal_art_1000>;
335 qcom,ath10k-calibration-variant = "GL-A1300";
336 };
337
338 &wifi1 {
339 status = "okay";
340 nvmem-cell-names = "pre-calibration";
341 nvmem-cells = <&precal_art_5000>;
342 qcom,ath10k-calibration-variant = "GL-A1300";
343 };