ipq4019: add support for ZTE MF287 Pro aka DreiNeo Pro
[openwrt/staging/neocturne.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-mf287pro.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
4 // Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
5
6 #include "qcom-ipq4018-mf287.dtsi"
7
8 / {
9 model = "ZTE MF287Pro";
10 compatible = "zte,mf287pro";
11
12 gpio_export {
13 compatible = "gpio-export";
14 #size-cells = <0>;
15
16 modem {
17 gpio-export,name = "modem-reset";
18 gpio-export,output = <0>;
19 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
20 };
21 };
22
23 regulator-usb-vbus {
24 compatible = "regulator-fixed";
25 regulator-name = "USB_VBUS";
26 regulator-min-microvolt = <5000000>;
27 regulator-max-microvolt = <5000000>;
28 regulator-always-on;
29 regulator-boot-on;
30 gpio = <&tlmm 25 GPIO_ACTIVE_LOW>;
31 };
32 };
33
34 &key_reset {
35 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
36 };
37
38 &key_wps {
39 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
40 };
41
42 &led_status {
43 gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
44 };
45
46 &mdio {
47 status = "okay";
48 pinctrl-0 = <&mdio_pins>;
49 pinctrl-names = "default";
50 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
51 reset-delay-us = <2000>;
52 };
53
54 &blsp1_spi1 {
55 pinctrl-0 = <&spi_0_pins>;
56 pinctrl-names = "default";
57 status = "okay";
58 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
59 <&tlmm 54 GPIO_ACTIVE_HIGH>;
60
61 flash@0 {
62 compatible = "jedec,spi-nor";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 reg = <0>;
66 spi-max-frequency = <24000000>;
67
68 partitions {
69 compatible = "fixed-partitions";
70 #address-cells = <1>;
71 #size-cells = <1>;
72
73 partition@0 {
74 label = "0:SBL1";
75 reg = <0x0 0x40000>;
76 read-only;
77 };
78
79 partition@40000 {
80 label = "0:MIBIB";
81 reg = <0x40000 0x20000>;
82 read-only;
83 };
84
85 partition@60000 {
86 label = "0:QSEE";
87 reg = <0x60000 0x60000>;
88 read-only;
89 };
90
91 partition@c0000 {
92 label = "0:CDT";
93 reg = <0xc0000 0x10000>;
94 read-only;
95 };
96
97 partition@d0000 {
98 label = "0:DDRPARAMS";
99 reg = <0xd0000 0x10000>;
100 read-only;
101 };
102
103 partition@e0000 {
104 label = "0:APPSBLENV";
105 reg = <0xe0000 0x10000>;
106 read-only;
107 };
108
109 partition@f0000 {
110 label = "0:APPSBL";
111 reg = <0xf0000 0xc0000>;
112 read-only;
113 };
114
115 partition@1b0000 {
116 label = "0:reserved1";
117 reg = <0x1b0000 0x50000>;
118 read-only;
119 };
120 };
121 };
122
123 spi-nand@1 { /* flash@1 ? */
124 compatible = "spi-nand";
125 reg = <1>;
126 spi-max-frequency = <24000000>;
127
128 partitions {
129 compatible = "fixed-partitions";
130 #address-cells = <1>;
131 #size-cells = <1>;
132
133 partition@0 {
134 label = "fota-flag";
135 reg = <0x0 0xa0000>;
136 read-only;
137 };
138
139 partition@a0000 {
140 label = "ART";
141 reg = <0xa0000 0x80000>;
142 read-only;
143 compatible = "nvmem-cells";
144 #address-cells = <1>;
145 #size-cells = <1>;
146
147 precal_art_1000: precal@1000 {
148 reg = <0x1000 0x2f20>;
149 };
150
151 precal_art_5000: precal@5000 {
152 reg = <0x5000 0x2f20>;
153 };
154 };
155
156 partition@120000 {
157 label = "mac";
158 reg = <0x120000 0x80000>;
159 read-only;
160 compatible = "nvmem-cells";
161 #address-cells = <1>;
162 #size-cells = <1>;
163
164 macaddr_mac_0: macaddr@0 {
165 reg = <0x0 0x6>;
166 };
167 };
168
169 partition@1a0000 {
170 label = "reserved2";
171 reg = <0x1a0000 0xc0000>;
172 };
173
174 partition@260000 {
175 label = "cfg-param";
176 reg = <0x260000 0x400000>;
177 read-only;
178 };
179
180 partition@660000 {
181 label = "log";
182 reg = <0x660000 0x400000>;
183 };
184
185 partition@a60000 {
186 label = "oops";
187 reg = <0xa60000 0xa0000>;
188 };
189
190 partition@b00000 {
191 label = "reserved3";
192 reg = <0xb00000 0x500000>;
193 };
194
195 partition@1000000 {
196 label = "web";
197 reg = <0x1000000 0x800000>;
198 };
199
200 partition@1800000 {
201 label = "rootfs";
202 reg = <0x1800000 0x1d00000>;
203 };
204
205 partition@3500000 {
206 label = "data";
207 reg = <0x3500000 0x1900000>;
208 };
209
210 partition@4e00000 {
211 label = "fota";
212 reg = <0x4e00000 0x3200000>;
213 };
214 };
215 };
216 };
217
218 &tlmm {
219 i2c_0_pins: i2c_0_pinmux {
220 mux {
221 pins = "gpio20", "gpio21";
222 function = "blsp_i2c0";
223 bias-disable;
224 };
225 };
226
227 mdio_pins: mdio_pinmux {
228 mux_1 {
229 pins = "gpio6";
230 function = "mdio";
231 bias-pull-up;
232 };
233
234 mux_2 {
235 pins = "gpio7";
236 function = "mdc";
237 bias-pull-up;
238 };
239 };
240
241 serial_pins: serial_pinmux {
242 mux {
243 pins = "gpio16", "gpio17";
244 function = "blsp_uart0";
245 bias-disable;
246 };
247 };
248
249 spi_0_pins: spi_0_pinmux {
250 pinmux {
251 function = "blsp_spi0";
252 pins = "gpio12", "gpio13", "gpio14", "gpio15";
253 drive-strength = <12>;
254 bias-disable;
255 };
256
257 pinmux_cs {
258 function = "gpio";
259 pins = "gpio12", "gpio54";
260 drive-strength = <2>;
261 bias-disable;
262 output-high;
263 };
264 };
265 };