target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6368_H
   4 #define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6368_H
   5
   6 #define BCM6368_IRQ_TIMER               0
   7 #define BCM6368_IRQ_SPI                 1
   8 #define BCM6368_IRQ_UART0               2
   9 #define BCM6368_IRQ_UART1               3
  10 #define BCM6368_IRQ_XDSL                4
  11 #define BCM6368_IRQ_OHCI                5
  12 #define BCM6368_IRQ_IPSEC               6
  13 #define BCM6368_IRQ_EHCI                7
  14 #define BCM6368_IRQ_USBS                8
  15 #define BCM6368_IRQ_RING_OSC            9
  16 #define BCM6368_IRQ_NAND                10
  17 #define BCM6368_IRQ_ATM                 11
  18 #define BCM6368_IRQ_PCM                 12
  19 #define BCM6368_IRQ_MPI                 13
  20 #define BCM6368_IRQ_DG                  14
  21 #define BCM6368_IRQ_EPHY                15
  22 #define BCM6368_IRQ_EPHY_EN0            16
  23 #define BCM6368_IRQ_EPHY_EN1            17
  24 #define BCM6368_IRQ_EPHY_EN2            18
  25 #define BCM6368_IRQ_EPHY_EN3            19
  26 #define BCM6368_IRQ_EXT0                20
  27 #define BCM6368_IRQ_EXT1                21
  28 #define BCM6368_IRQ_EXT2                22
  29 #define BCM6368_IRQ_EXT3                23
  30 #define BCM6368_IRQ_EXT4                24
  31 #define BCM6368_IRQ_EXT5                25
  32 #define BCM6368_IRQ_USB_CTL_RX_DMA      26
  33 #define BCM6368_IRQ_USB_CTL_TX_DMA      27
  34 #define BCM6368_IRQ_USB_BULK_RX_DMA     28
  35 #define BCM6368_IRQ_USB_BULK_TX_DMA     29
  36 #define BCM6368_IRQ_USB_ISO_RX_DMA      30
  37 #define BCM6368_IRQ_USB_ISO_TX_DMA      31
  38 #define BCM6368_IRQ_ENETSW_RX_DMA0      32
  39 #define BCM6368_IRQ_ENETSW_RX_DMA1      33
  40 #define BCM6368_IRQ_ENETSW_RX_DMA2      34
  41 #define BCM6368_IRQ_ENETSW_RX_DMA3      35
  42 #define BCM6368_IRQ_ENETSW_TX_DMA0      36
  43 #define BCM6368_IRQ_ENETSW_TX_DMA1      37
  44 #define BCM6368_IRQ_ENETSW_TX_DMA2      38
  45 #define BCM6368_IRQ_ENETSW_TX_DMA3      39
  46 #define BCM6368_IRQ_ATM_DMA0            40
  47 #define BCM6368_IRQ_ATM_DMA1            41
  48 #define BCM6368_IRQ_ATM_DMA2            42
  49 #define BCM6368_IRQ_ATM_DMA3            43
  50 #define BCM6368_IRQ_ATM_DMA4            44
  51 #define BCM6368_IRQ_ATM_DMA5            45
  52 #define BCM6368_IRQ_ATM_DMA6            46
  53 #define BCM6368_IRQ_ATM_DMA7            47
  54 #define BCM6368_IRQ_ATM_DMA8            48
  55 #define BCM6368_IRQ_ATM_DMA9            49
  56 #define BCM6368_IRQ_ATM_DMA10           50
  57 #define BCM6368_IRQ_ATM_DMA11           51
  58 #define BCM6368_IRQ_ATM_DMA12           52
  59 #define BCM6368_IRQ_ATM_DMA13           53
  60 #define BCM6368_IRQ_ATM_DMA14           54
  61 #define BCM6368_IRQ_ATM_DMA15           55
  62 #define BCM6368_IRQ_ATM_DMA16           56
  63 #define BCM6368_IRQ_ATM_DMA17           57
  64 #define BCM6368_IRQ_ATM_DMA18           58
  65 #define BCM6368_IRQ_ATM_DMA19           59
  66 #define BCM6368_IRQ_IPSEC_DMA0          60
  67 #define BCM6368_IRQ_IPSEC_DMA1          61
  68 #define BCM6368_IRQ_PCM_DMA0            62
  69 #define BCM6368_IRQ_PCM_DMA1            63
  70
  71 #endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6368_H */