target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6328_H
   4 #define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6328_H
   5
   6 #define BCM6328_IRQ_NAND                0
   7 #define BCM6328_IRQ_PCM                 1
   8 #define BCM6328_IRQ_PCM_DMA0            2
   9 #define BCM6328_IRQ_PCM_DMA1            3
  10 #define BCM6328_IRQ_USBS                4
  11 #define BCM6328_IRQ_USB_CTL_RX_DMA      5
  12 #define BCM6328_IRQ_USB_CTL_TX_DMA      6
  13 #define BCM6328_IRQ_USB_BULK_RX_DMA     7
  14 #define BCM6328_IRQ_USB_BULK_TX_DMA     8
  15 #define BCM6328_IRQ_USB_ISO_RX_DMA      9
  16 #define BCM6328_IRQ_USB_ISO_TX_DMA      10
  17 #define BCM6328_IRQ_DG                  11
  18 #define BCM6328_IRQ_EPHY                12
  19 #define BCM6328_IRQ_EPHY_EN0N           13
  20 #define BCM6328_IRQ_EPHY_EN1N           14
  21 #define BCM6328_IRQ_EPHY_EN2N           15
  22 #define BCM6328_IRQ_EPHY_EN3N           16
  23 #define BCM6328_IRQ_EPHY_EN0            17
  24 #define BCM6328_IRQ_EPHY_EN1            18
  25 #define BCM6328_IRQ_EPHY_EN2            19
  26 #define BCM6328_IRQ_EPHY_EN3            20
  27 #define BCM6328_IRQ_XDSL                21
  28 #define BCM6328_IRQ_PCIE_EP             22
  29 #define BCM6328_IRQ_PCIE_RC             23
  30 #define BCM6328_IRQ_EXTO                24
  31 #define BCM6328_IRQ_EXT1                25
  32 #define BCM6328_IRQ_EXT2                26
  33 #define BCM6328_IRQ_EXT3                27
  34 #define BCM6328_IRQ_UART0               28
  35 #define BCM6328_IRQ_HSSPI               29
  36 #define BCM6328_IRQ_WAKE_ON_IRQ         30
  37 #define BCM6328_IRQ_TIMER               31
  38 #define BCM6328_IRQ_ENETSW_RX_DMA0      32
  39 #define BCM6328_IRQ_ENETSW_RX_DMA1      33
  40 #define BCM6328_IRQ_ENETSW_TX_DMA0      34
  41 #define BCM6328_IRQ_ENETSW_TX_DMA1      35
  42 #define BCM6328_IRQ_UART1               39
  43 #define BCM6328_IRQ_ENETSW              40
  44 #define BCM6328_IRQ_OHCI                41
  45 #define BCM6328_IRQ_EHCI                42
  46 #define BCM6328_IRQ_ATM_DMA0            43
  47 #define BCM6328_IRQ_ATM_DMA1            44
  48 #define BCM6328_IRQ_ATM_DMA2            45
  49 #define BCM6328_IRQ_ATM_DMA3            46
  50 #define BCM6328_IRQ_ATM_DMA4            47
  51 #define BCM6328_IRQ_ATM_DMA5            48
  52 #define BCM6328_IRQ_ATM_DMA6            49
  53 #define BCM6328_IRQ_ATM_DMA7            50
  54 #define BCM6328_IRQ_ATM_DMA8            51
  55 #define BCM6328_IRQ_ATM_DMA9            52
  56 #define BCM6328_IRQ_ATM_DMA10           53
  57 #define BCM6328_IRQ_ATM_DMA11           54
  58 #define BCM6328_IRQ_ATM_DMA12           55
  59 #define BCM6328_IRQ_ATM_DMA13           56
  60 #define BCM6328_IRQ_ATM_DMA14           57
  61 #define BCM6328_IRQ_ATM_DMA15           58
  62 #define BCM6328_IRQ_ATM_DMA16           59
  63 #define BCM6328_IRQ_ATM_DMA17           60
  64 #define BCM6328_IRQ_ATM_DMA18           61
  65 #define BCM6328_IRQ_ATM_DMA19           62
  66 #define BCM6328_IRQ_SAR                 63
  67
  68 #define BCM6328_EXTIRQ_0                0 /* GPIO 23 */
  69 #define BCM6328_EXTIRQ_1                1 /* GPIO 24 */
  70 #define BCM6328_EXTIRQ_2                2 /* GPIO 15 */
  71 #define BCM6328_EXTIRQ_3                3 /* GPIO 12 */
  72
  73 #endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6328_H */