bmips: document GPIO external interrupts
[openwrt/staging/dedeckeh.git] / target / linux / bmips / dts / bcm6362.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6362-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/bcm6362-reset.h>
11 #include <dt-bindings/soc/bcm6362-pm.h>
12
13 / {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 compatible = "brcm,bcm6362";
17
18 aliases {
19 nflash = &nflash;
20 pinctrl = &pinctrl;
21 serial0 = &uart0;
22 serial1 = &uart1;
23 spi0 = &lsspi;
24 spi1 = &hsspi;
25 };
26
27 chosen {
28 bootargs = "earlycon";
29 stdout-path = "serial0:115200n8";
30 };
31
32 clocks {
33 periph_osc: periph-osc {
34 compatible = "fixed-clock";
35
36 #clock-cells = <0>;
37
38 clock-frequency = <50000000>;
39 clock-output-names = "periph";
40 };
41
42 hsspi_osc: hsspi-osc {
43 compatible = "fixed-clock";
44
45 #clock-cells = <0>;
46
47 clock-frequency = <400000000>;
48 clock-output-names = "hsspi_osc";
49 };
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55 mips-hpt-frequency = <200000000>;
56
57 cpu@0 {
58 compatible = "brcm,bmips4350", "mips,mips4Kc";
59 device_type = "cpu";
60 reg = <0>;
61 };
62
63 cpu@1 {
64 compatible = "brcm,bmips4350", "mips,mips4Kc";
65 device_type = "cpu";
66 reg = <1>;
67 };
68 };
69
70 cpu_intc: interrupt-controller {
71 #address-cells = <0>;
72 compatible = "mti,cpu-interrupt-controller";
73
74 interrupt-controller;
75 #interrupt-cells = <1>;
76 };
77
78 memory@0 {
79 device_type = "memory";
80 reg = <0 0>;
81 };
82
83 ubus {
84 #address-cells = <1>;
85 #size-cells = <1>;
86
87 compatible = "simple-bus";
88 ranges;
89
90 periph_clk: clock-controller@10000004 {
91 compatible = "brcm,bcm6362-clocks";
92 reg = <0x10000004 0x4>;
93 #clock-cells = <1>;
94 };
95
96 pll_cntl: syscon@10000008 {
97 compatible = "syscon", "simple-mfd";
98 reg = <0x10000008 0x4>;
99 native-endian;
100
101 syscon-reboot {
102 compatible = "syscon-reboot";
103 offset = <0x0>;
104 mask = <0x1>;
105 };
106 };
107
108 periph_rst: reset-controller@10000010 {
109 compatible = "brcm,bcm6345-reset";
110 reg = <0x10000010 0x4>;
111 #reset-cells = <1>;
112 };
113
114 ext_intc: interrupt-controller@10000018 {
115 #address-cells = <1>;
116 compatible = "brcm,bcm6345-ext-intc";
117 reg = <0x10000018 0x4>;
118
119 interrupt-controller;
120 #interrupt-cells = <2>;
121
122 interrupt-parent = <&periph_intc>;
123 interrupts = <BCM6362_IRQ_EXT0>,
124 <BCM6362_IRQ_EXT1>,
125 <BCM6362_IRQ_EXT2>,
126 <BCM6362_IRQ_EXT3>;
127 };
128
129 periph_intc: interrupt-controller@10000020 {
130 #address-cells = <1>;
131 compatible = "brcm,bcm6345-l1-intc";
132 reg = <0x10000020 0x10>,
133 <0x10000030 0x10>;
134
135 interrupt-controller;
136 #interrupt-cells = <1>;
137
138 interrupt-parent = <&cpu_intc>;
139 interrupts = <2>, <3>;
140 };
141
142 wdt: watchdog@1000005c {
143 compatible = "brcm,bcm7038-wdt";
144 reg = <0x1000005c 0xc>;
145
146 clocks = <&periph_osc>;
147
148 timeout-sec = <30>;
149 };
150
151 gpio_cntl: syscon@10000080 {
152 #address-cells = <1>;
153 #size-cells = <1>;
154 compatible = "brcm,bcm6362-gpio-sysctl",
155 "syscon", "simple-mfd";
156 reg = <0x10000080 0x80>;
157 ranges = <0 0x10000080 0x80>;
158 native-endian;
159
160 gpio: gpio@0 {
161 compatible = "brcm,bcm6362-gpio";
162 reg-names = "dirout", "dat";
163 reg = <0x0 0x8>, <0x8 0x8>;
164
165 gpio-controller;
166 gpio-ranges = <&pinctrl 0 0 48>;
167 #gpio-cells = <2>;
168 };
169
170 pinctrl: pinctrl@18 {
171 compatible = "brcm,bcm6362-pinctrl";
172 reg = <0x18 0x10>, <0x38 0x4>;
173
174 pinctrl_usb_device_led: usb_device_led-pins {
175 function = "usb_device_led";
176 pins = "gpio0";
177 };
178
179 pinctrl_sys_irq: sys_irq-pins {
180 function = "sys_irq";
181 pins = "gpio1";
182 };
183
184 pinctrl_serial_led: serial_led-pins {
185 pinctrl_serial_led_clk: serial_led_clk-pins {
186 function = "serial_led_clk";
187 pins = "gpio2";
188 };
189
190 pinctrl_serial_led_data: serial_led_data-pins {
191 function = "serial_led_data";
192 pins = "gpio3";
193 };
194 };
195
196 pinctrl_robosw_led_data: robosw_led_data-pins {
197 function = "robosw_led_data";
198 pins = "gpio4";
199 };
200
201 pinctrl_robosw_led_clk: robosw_led_clk-pins {
202 function = "robosw_led_clk";
203 pins = "gpio5";
204 };
205
206 pinctrl_robosw_led0: robosw_led0-pins {
207 function = "robosw_led0";
208 pins = "gpio6";
209 };
210
211 pinctrl_robosw_led1: robosw_led1-pins {
212 function = "robosw_led1";
213 pins = "gpio7";
214 };
215
216 pinctrl_inet_led: inet_led-pins {
217 function = "inet_led";
218 pins = "gpio8";
219 };
220
221 pinctrl_spi_cs2: spi_cs2-pins {
222 function = "spi_cs2";
223 pins = "gpio9";
224 };
225
226 pinctrl_spi_cs3: spi_cs3-pins {
227 function = "spi_cs3";
228 pins = "gpio10";
229 };
230
231 pinctrl_ntr_pulse: ntr_pulse-pins {
232 function = "ntr_pulse";
233 pins = "gpio11";
234 };
235
236 pinctrl_uart1_scts: uart1_scts-pins {
237 function = "uart1_scts";
238 pins = "gpio12";
239 };
240
241 pinctrl_uart1_srts: uart1_srts-pins {
242 function = "uart1_srts";
243 pins = "gpio13";
244 };
245
246 pinctrl_uart1: uart1-pins {
247 pinctrl_uart1_sdin: uart1_sdin-pins {
248 function = "uart1_sdin";
249 pins = "gpio14";
250 };
251
252 pinctrl_uart1_sdout: uart1_sdout-pins {
253 function = "uart1_sdout";
254 pins = "gpio15";
255 };
256 };
257
258 pinctrl_adsl_spi: adsl_spi-pins {
259 pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
260 function = "adsl_spi_miso";
261 pins = "gpio16";
262 };
263
264 pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
265 function = "adsl_spi_mosi";
266 pins = "gpio17";
267 };
268
269 pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
270 function = "adsl_spi_clk";
271 pins = "gpio18";
272 };
273
274 pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
275 function = "adsl_spi_cs";
276 pins = "gpio19";
277 };
278 };
279
280 pinctrl_ephy0_led: ephy0_led-pins {
281 function = "ephy0_led";
282 pins = "gpio20";
283 };
284
285 pinctrl_ephy1_led: ephy1_led-pins {
286 function = "ephy1_led";
287 pins = "gpio21";
288 };
289
290 pinctrl_ephy2_led: ephy2_led-pins {
291 function = "ephy2_led";
292 pins = "gpio22";
293 };
294
295 pinctrl_ephy3_led: ephy3_led-pins {
296 function = "ephy3_led";
297 pins = "gpio23";
298 };
299
300 pinctrl_ext_irq0: ext_irq0-pins {
301 function = "ext_irq0";
302 pins = "gpio24";
303 };
304
305 pinctrl_ext_irq1: ext_irq1-pins {
306 function = "ext_irq1";
307 pins = "gpio25";
308 };
309
310 pinctrl_ext_irq2: ext_irq2-pins {
311 function = "ext_irq2";
312 pins = "gpio26";
313 };
314
315 pinctrl_ext_irq3: ext_irq3-pins {
316 function = "ext_irq3";
317 pins = "gpio27";
318 };
319
320 pinctrl_nand: nand-pins {
321 function = "nand";
322 group = "nand_grp";
323 };
324 };
325 };
326
327 uart0: serial@10000100 {
328 compatible = "brcm,bcm6345-uart";
329 reg = <0x10000100 0x18>;
330
331 interrupt-parent = <&periph_intc>;
332 interrupts = <BCM6362_IRQ_UART0>;
333
334 clocks = <&periph_osc>;
335 clock-names = "periph";
336
337 status = "disabled";
338 };
339
340 uart1: serial@10000120 {
341 compatible = "brcm,bcm6345-uart";
342 reg = <0x10000120 0x18>;
343
344 interrupt-parent = <&periph_intc>;
345 interrupts = <BCM6362_IRQ_UART1>;
346
347 clocks = <&periph_osc>;
348 clock-names = "periph";
349
350 status = "disabled";
351 };
352
353 nflash: nand@10000200 {
354 #address-cells = <1>;
355 #size-cells = <0>;
356 compatible = "brcm,nand-bcm6368",
357 "brcm,brcmnand-v2.2",
358 "brcm,brcmnand";
359 reg = <0x10000200 0x180>,
360 <0x10000600 0x200>,
361 <0x10000070 0x10>;
362 reg-names = "nand",
363 "nand-cache",
364 "nand-int-base";
365
366 interrupt-parent = <&periph_intc>;
367 interrupts = <BCM6362_IRQ_NAND>;
368
369 clocks = <&periph_clk BCM6362_CLK_NAND>;
370 clock-names = "nand";
371
372 pinctrl-names = "default";
373 pinctrl-0 = <&pinctrl_nand>;
374
375 status = "disabled";
376 };
377
378 lsspi: spi@10000800 {
379 #address-cells = <1>;
380 #size-cells = <0>;
381 compatible = "brcm,bcm6358-spi";
382 reg = <0x10000800 0x70c>;
383
384 interrupt-parent = <&periph_intc>;
385 interrupts = <BCM6362_IRQ_LSSPI>;
386
387 clocks = <&periph_clk BCM6362_CLK_SPI>;
388 clock-names = "spi";
389
390 resets = <&periph_rst BCM6362_RST_SPI>;
391
392 status = "disabled";
393 };
394
395 hsspi: spi@10001000 {
396 #address-cells = <1>;
397 #size-cells = <0>;
398 compatible = "brcm,bcm6328-hsspi";
399 reg = <0x10001000 0x600>;
400
401 interrupt-parent = <&periph_intc>;
402 interrupts = <BCM6362_IRQ_HSSPI>;
403
404 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
405 <&hsspi_osc>;
406 clock-names = "hsspi",
407 "pll";
408
409 resets = <&periph_rst BCM6362_RST_SPI>;
410
411 status = "disabled";
412 };
413
414 serdes_cntl: syscon@10001804 {
415 compatible = "syscon";
416 reg = <0x10001804 0x4>;
417 native-endian;
418 };
419
420 periph_pwr: power-controller@10001848 {
421 compatible = "brcm,bcm6362-power-controller";
422 reg = <0x10001848 0x4>;
423 #power-domain-cells = <1>;
424 };
425
426 leds: led-controller@10001900 {
427 #address-cells = <1>;
428 #size-cells = <0>;
429 compatible = "brcm,bcm6328-leds";
430 reg = <0x10001900 0x24>;
431
432 status = "disabled";
433 };
434
435 ehci: usb@10002500 {
436 compatible = "brcm,bcm6362-ehci", "generic-ehci";
437 reg = <0x10002500 0x100>;
438 big-endian;
439 spurious-oc;
440
441 interrupt-parent = <&periph_intc>;
442 interrupts = <BCM6362_IRQ_EHCI>;
443
444 phys = <&usbh 0>;
445 phy-names = "usb";
446
447 status = "disabled";
448 };
449
450 ohci: usb@10002600 {
451 compatible = "brcm,bcm6362-ohci", "generic-ohci";
452 reg = <0x10002600 0x100>;
453 big-endian;
454 no-big-frame-no;
455
456 interrupt-parent = <&periph_intc>;
457 interrupts = <BCM6362_IRQ_OHCI>;
458
459 phys = <&usbh 0>;
460 phy-names = "usb";
461
462 status = "disabled";
463 };
464
465 usbh: usb-phy@10002700 {
466 compatible = "brcm,bcm6362-usbh-phy";
467 reg = <0x10002700 0x38>;
468
469 #phy-cells = <1>;
470
471 clocks = <&periph_clk BCM6362_CLK_USBH>;
472 clock-names = "usbh";
473
474 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
475 resets = <&periph_rst BCM6362_RST_USBH>;
476
477 status = "disabled";
478 };
479
480 random: rng@10002880 {
481 compatible = "brcm,bcm6368-rng";
482 reg = <0x10002880 0x14>;
483
484 clocks = <&periph_clk BCM6362_CLK_IPSEC>;
485 clock-names = "ipsec";
486
487 resets = <&periph_rst BCM6362_RST_IPSEC>;
488
489 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_IPSEC>;
490 };
491
492 ethernet: ethernet@1000d800 {
493 compatible = "brcm,bcm6362-enetsw";
494 reg = <0x1000d800 0x80>,
495 <0x1000da00 0x80>,
496 <0x1000dc00 0x80>;
497 reg-names = "dma",
498 "dma-channels",
499 "dma-sram";
500
501 interrupt-parent = <&periph_intc>;
502 interrupts = <BCM6362_IRQ_ENETSW_RX_DMA0>;
503 interrupt-names = "rx";
504
505 clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
506 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
507 <&periph_clk BCM6362_CLK_ROBOSW>;
508
509 resets = <&periph_rst BCM6362_RST_ENETSW>,
510 <&periph_rst BCM6362_RST_EPHY>;
511
512 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>,
513 <&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>;
514
515 dma-rx = <0>;
516 dma-tx = <1>;
517
518 status = "disabled";
519 };
520
521 switch0: switch@10e00000 {
522 #address-cells = <1>;
523 #size-cells = <0>;
524 compatible = "brcm,bcm6362-switch";
525 reg = <0x10e00000 0x8000>;
526 big-endian;
527
528 ports {
529 #address-cells = <1>;
530 #size-cells = <0>;
531
532 port@8 {
533 reg = <8>;
534
535 phy-mode = "internal";
536 ethernet = <&ethernet>;
537
538 fixed-link {
539 speed = <1000>;
540 full-duplex;
541 };
542 };
543 };
544 };
545
546 mdio: mdio@10e000b0 {
547 #address-cells = <1>;
548 #size-cells = <0>;
549 compatible = "brcm,bcm6368-mdio-mux";
550 reg = <0x10e000b0 0x8>;
551
552 mdio_int: mdio@0 {
553 #address-cells = <1>;
554 #size-cells = <0>;
555 reg = <0>;
556
557 phy1: ethernet-phy@1 {
558 compatible = "ethernet-phy-ieee802.3-c22";
559 reg = <1>;
560 };
561
562 phy2: ethernet-phy@2 {
563 compatible = "ethernet-phy-ieee802.3-c22";
564 reg = <2>;
565 };
566
567 phy3: ethernet-phy@3 {
568 compatible = "ethernet-phy-ieee802.3-c22";
569 reg = <3>;
570 };
571
572 phy4: ethernet-phy@4 {
573 compatible = "ethernet-phy-ieee802.3-c22";
574 reg = <4>;
575 };
576 };
577
578 mdio_ext: mdio@1 {
579 #address-cells = <1>;
580 #size-cells = <0>;
581 reg = <1>;
582 };
583 };
584
585 pcie: pcie@10e40000 {
586 compatible = "brcm,bcm6328-pcie";
587 reg = <0x10e40000 0x10000>;
588 #address-cells = <3>;
589 #size-cells = <2>;
590
591 device_type = "pci";
592 bus-range = <0x00 0x01>;
593 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
594 linux,pci-probe-only = <1>;
595
596 interrupt-parent = <&periph_intc>;
597 interrupts = <BCM6362_IRQ_PCIE_RC>;
598
599 clocks = <&periph_clk BCM6362_CLK_PCIE>;
600 clock-names = "pcie";
601
602 resets = <&periph_rst BCM6362_RST_PCIE>,
603 <&periph_rst BCM6362_RST_PCIE_EXT>,
604 <&periph_rst BCM6362_RST_PCIE_CORE>;
605 reset-names = "pcie",
606 "pcie-ext",
607 "pcie-core";
608
609 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>;
610
611 brcm,serdes = <&serdes_cntl>;
612
613 status = "disabled";
614 };
615 };
616 };