1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6362-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6362-reset.h>
10 #include <dt-bindings/soc/bcm6362-pm.h>
15 compatible = "brcm,bcm6362";
27 bootargs = "earlycon";
28 stdout-path = "serial0:115200n8";
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
46 clock-frequency = <400000000>;
47 clock-output-names = "hsspi_osc";
54 mips-hpt-frequency = <200000000>;
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
69 cpu_intc: interrupt-controller {
71 compatible = "mti,cpu-interrupt-controller";
74 #interrupt-cells = <1>;
78 device_type = "memory";
86 compatible = "simple-bus";
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm6362-clocks";
91 reg = <0x10000004 0x4>;
95 pll_cntl: syscon@10000008 {
96 compatible = "syscon", "simple-mfd";
97 reg = <0x10000008 0x4>;
101 compatible = "syscon-reboot";
107 periph_rst: reset-controller@10000010 {
108 compatible = "brcm,bcm6345-reset";
109 reg = <0x10000010 0x4>;
113 ext_intc: interrupt-controller@10000018 {
114 #address-cells = <1>;
115 compatible = "brcm,bcm6345-ext-intc";
116 reg = <0x10000018 0x4>;
118 interrupt-controller;
119 #interrupt-cells = <2>;
121 interrupt-parent = <&periph_intc>;
122 interrupts = <BCM6362_IRQ_EXT0>,
128 periph_intc: interrupt-controller@10000020 {
129 #address-cells = <1>;
130 compatible = "brcm,bcm6345-l1-intc";
131 reg = <0x10000020 0x10>,
134 interrupt-controller;
135 #interrupt-cells = <1>;
137 interrupt-parent = <&cpu_intc>;
138 interrupts = <2>, <3>;
141 wdt: watchdog@1000005c {
142 compatible = "brcm,bcm7038-wdt";
143 reg = <0x1000005c 0xc>;
145 clocks = <&periph_osc>;
150 gpio_cntl: syscon@10000080 {
151 #address-cells = <1>;
153 compatible = "brcm,bcm6362-gpio-sysctl",
154 "syscon", "simple-mfd";
155 reg = <0x10000080 0x80>;
156 ranges = <0 0x10000080 0x80>;
160 compatible = "brcm,bcm6362-gpio";
161 reg-names = "dirout", "dat";
162 reg = <0x0 0x8>, <0x8 0x8>;
165 gpio-ranges = <&pinctrl 0 0 48>;
169 pinctrl: pinctrl@18 {
170 compatible = "brcm,bcm6362-pinctrl";
171 reg = <0x18 0x10>, <0x38 0x4>;
173 pinctrl_usb_device_led: usb_device_led-pins {
174 function = "usb_device_led";
178 pinctrl_sys_irq: sys_irq-pins {
179 function = "sys_irq";
183 pinctrl_serial_led: serial_led-pins {
184 pinctrl_serial_led_clk: serial_led_clk-pins {
185 function = "serial_led_clk";
189 pinctrl_serial_led_data: serial_led_data-pins {
190 function = "serial_led_data";
195 pinctrl_robosw_led_data: robosw_led_data-pins {
196 function = "robosw_led_data";
200 pinctrl_robosw_led_clk: robosw_led_clk-pins {
201 function = "robosw_led_clk";
205 pinctrl_robosw_led0: robosw_led0-pins {
206 function = "robosw_led0";
210 pinctrl_robosw_led1: robosw_led1-pins {
211 function = "robosw_led1";
215 pinctrl_inet_led: inet_led-pins {
216 function = "inet_led";
220 pinctrl_spi_cs2: spi_cs2-pins {
221 function = "spi_cs2";
225 pinctrl_spi_cs3: spi_cs3-pins {
226 function = "spi_cs3";
230 pinctrl_ntr_pulse: ntr_pulse-pins {
231 function = "ntr_pulse";
235 pinctrl_uart1_scts: uart1_scts-pins {
236 function = "uart1_scts";
240 pinctrl_uart1_srts: uart1_srts-pins {
241 function = "uart1_srts";
245 pinctrl_uart1: uart1-pins {
246 pinctrl_uart1_sdin: uart1_sdin-pins {
247 function = "uart1_sdin";
251 pinctrl_uart1_sdout: uart1_sdout-pins {
252 function = "uart1_sdout";
257 pinctrl_adsl_spi: adsl_spi-pins {
258 pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
259 function = "adsl_spi_miso";
263 pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
264 function = "adsl_spi_mosi";
268 pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
269 function = "adsl_spi_clk";
273 pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
274 function = "adsl_spi_cs";
279 pinctrl_ephy0_led: ephy0_led-pins {
280 function = "ephy0_led";
284 pinctrl_ephy1_led: ephy1_led-pins {
285 function = "ephy1_led";
289 pinctrl_ephy2_led: ephy2_led-pins {
290 function = "ephy2_led";
294 pinctrl_ephy3_led: ephy3_led-pins {
295 function = "ephy3_led";
299 pinctrl_ext_irq0: ext_irq0-pins {
300 function = "ext_irq0";
304 pinctrl_ext_irq1: ext_irq1-pins {
305 function = "ext_irq1";
309 pinctrl_ext_irq2: ext_irq2-pins {
310 function = "ext_irq2";
314 pinctrl_ext_irq3: ext_irq3-pins {
315 function = "ext_irq3";
319 pinctrl_nand: nand-pins {
326 uart0: serial@10000100 {
327 compatible = "brcm,bcm6345-uart";
328 reg = <0x10000100 0x18>;
330 interrupt-parent = <&periph_intc>;
331 interrupts = <BCM6362_IRQ_UART0>;
333 clocks = <&periph_osc>;
334 clock-names = "periph";
339 uart1: serial@10000120 {
340 compatible = "brcm,bcm6345-uart";
341 reg = <0x10000120 0x18>;
343 interrupt-parent = <&periph_intc>;
344 interrupts = <BCM6362_IRQ_UART1>;
346 clocks = <&periph_osc>;
347 clock-names = "periph";
352 nflash: nand@10000200 {
353 #address-cells = <1>;
355 compatible = "brcm,nand-bcm6368",
356 "brcm,brcmnand-v2.2",
358 reg = <0x10000200 0x180>,
365 interrupt-parent = <&periph_intc>;
366 interrupts = <BCM6362_IRQ_NAND>;
368 clocks = <&periph_clk BCM6362_CLK_NAND>;
369 clock-names = "nand";
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_nand>;
377 lsspi: spi@10000800 {
378 #address-cells = <1>;
380 compatible = "brcm,bcm6358-spi";
381 reg = <0x10000800 0x70c>;
383 interrupt-parent = <&periph_intc>;
384 interrupts = <BCM6362_IRQ_LSSPI>;
386 clocks = <&periph_clk BCM6362_CLK_SPI>;
389 resets = <&periph_rst BCM6362_RST_SPI>;
394 hsspi: spi@10001000 {
395 #address-cells = <1>;
397 compatible = "brcm,bcm6328-hsspi";
398 reg = <0x10001000 0x600>;
400 interrupt-parent = <&periph_intc>;
401 interrupts = <BCM6362_IRQ_HSSPI>;
403 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
405 clock-names = "hsspi",
408 resets = <&periph_rst BCM6362_RST_SPI>;
413 serdes_cntl: syscon@10001804 {
414 compatible = "syscon";
415 reg = <0x10001804 0x4>;
419 periph_pwr: power-controller@10001848 {
420 compatible = "brcm,bcm6362-power-controller";
421 reg = <0x10001848 0x4>;
422 #power-domain-cells = <1>;
425 leds: led-controller@10001900 {
426 #address-cells = <1>;
428 compatible = "brcm,bcm6328-leds";
429 reg = <0x10001900 0x24>;
435 compatible = "brcm,bcm6362-ehci", "generic-ehci";
436 reg = <0x10002500 0x100>;
440 interrupt-parent = <&periph_intc>;
441 interrupts = <BCM6362_IRQ_EHCI>;
450 compatible = "brcm,bcm6362-ohci", "generic-ohci";
451 reg = <0x10002600 0x100>;
455 interrupt-parent = <&periph_intc>;
456 interrupts = <BCM6362_IRQ_OHCI>;
464 usbh: usb-phy@10002700 {
465 compatible = "brcm,bcm6362-usbh-phy";
466 reg = <0x10002700 0x38>;
470 clocks = <&periph_clk BCM6362_CLK_USBH>;
471 clock-names = "usbh";
473 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
474 resets = <&periph_rst BCM6362_RST_USBH>;
479 random: rng@10002880 {
480 compatible = "brcm,bcm6368-rng";
481 reg = <0x10002880 0x14>;
483 clocks = <&periph_clk BCM6362_CLK_IPSEC>;
484 clock-names = "ipsec";
486 resets = <&periph_rst BCM6362_RST_IPSEC>;
488 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_IPSEC>;
491 ethernet: ethernet@1000d800 {
492 compatible = "brcm,bcm6362-enetsw";
493 reg = <0x1000d800 0x80>,
500 interrupt-parent = <&periph_intc>;
501 interrupts = <BCM6362_IRQ_ENETSW_RX_DMA0>;
502 interrupt-names = "rx";
504 clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
505 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
506 <&periph_clk BCM6362_CLK_ROBOSW>;
508 resets = <&periph_rst BCM6362_RST_ENETSW>,
509 <&periph_rst BCM6362_RST_EPHY>;
511 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>,
512 <&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>;
520 switch0: switch@10e00000 {
521 #address-cells = <1>;
523 compatible = "brcm,bcm6362-switch";
524 reg = <0x10e00000 0x8000>;
528 #address-cells = <1>;
534 phy-mode = "internal";
535 ethernet = <ðernet>;
545 mdio: mdio@10e000b0 {
546 #address-cells = <1>;
548 compatible = "brcm,bcm6368-mdio-mux";
549 reg = <0x10e000b0 0x8>;
552 #address-cells = <1>;
556 phy1: ethernet-phy@1 {
557 compatible = "ethernet-phy-ieee802.3-c22";
561 phy2: ethernet-phy@2 {
562 compatible = "ethernet-phy-ieee802.3-c22";
566 phy3: ethernet-phy@3 {
567 compatible = "ethernet-phy-ieee802.3-c22";
571 phy4: ethernet-phy@4 {
572 compatible = "ethernet-phy-ieee802.3-c22";
578 #address-cells = <1>;
584 pcie: pcie@10e40000 {
585 compatible = "brcm,bcm6328-pcie";
586 reg = <0x10e40000 0x10000>;
587 #address-cells = <3>;
591 bus-range = <0x00 0x01>;
592 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
593 linux,pci-probe-only = <1>;
595 interrupt-parent = <&periph_intc>;
596 interrupts = <BCM6362_IRQ_PCIE_RC>;
598 clocks = <&periph_clk BCM6362_CLK_PCIE>;
599 clock-names = "pcie";
601 resets = <&periph_rst BCM6362_RST_PCIE>,
602 <&periph_rst BCM6362_RST_PCIE_EXT>,
603 <&periph_rst BCM6362_RST_PCIE_CORE>;
604 reset-names = "pcie",
608 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>;
610 brcm,serdes = <&serdes_cntl>;