d7fff43c441f6cdd448361781a733c1cf0759655
[openwrt/staging/dedeckeh.git] / target / linux / bmips / dts / bcm6362.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6362-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6362-reset.h>
10 #include <dt-bindings/soc/bcm6362-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6362";
16
17 aliases {
18 nflash = &nflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi0 = &lsspi;
23 spi1 = &hsspi;
24 };
25
26 chosen {
27 bootargs = "earlycon";
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
34
35 #clock-cells = <0>;
36
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
39 };
40
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
43
44 #clock-cells = <0>;
45
46 clock-frequency = <400000000>;
47 clock-output-names = "hsspi_osc";
48 };
49 };
50
51 cpus {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 mips-hpt-frequency = <200000000>;
55
56 cpu@0 {
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
58 device_type = "cpu";
59 reg = <0>;
60 };
61
62 cpu@1 {
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
64 device_type = "cpu";
65 reg = <1>;
66 };
67 };
68
69 cpu_intc: interrupt-controller {
70 #address-cells = <0>;
71 compatible = "mti,cpu-interrupt-controller";
72
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 };
76
77 memory@0 {
78 device_type = "memory";
79 reg = <0 0>;
80 };
81
82 ubus {
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 compatible = "simple-bus";
87 ranges;
88
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm6362-clocks";
91 reg = <0x10000004 0x4>;
92 #clock-cells = <1>;
93 };
94
95 pll_cntl: syscon@10000008 {
96 compatible = "syscon", "simple-mfd";
97 reg = <0x10000008 0x4>;
98 native-endian;
99
100 syscon-reboot {
101 compatible = "syscon-reboot";
102 offset = <0x0>;
103 mask = <0x1>;
104 };
105 };
106
107 periph_rst: reset-controller@10000010 {
108 compatible = "brcm,bcm6345-reset";
109 reg = <0x10000010 0x4>;
110 #reset-cells = <1>;
111 };
112
113 ext_intc: interrupt-controller@10000018 {
114 #address-cells = <1>;
115 compatible = "brcm,bcm6345-ext-intc";
116 reg = <0x10000018 0x4>;
117
118 interrupt-controller;
119 #interrupt-cells = <2>;
120
121 interrupt-parent = <&periph_intc>;
122 interrupts = <BCM6362_IRQ_EXT0>,
123 <BCM6362_IRQ_EXT1>,
124 <BCM6362_IRQ_EXT2>,
125 <BCM6362_IRQ_EXT3>;
126 };
127
128 periph_intc: interrupt-controller@10000020 {
129 #address-cells = <1>;
130 compatible = "brcm,bcm6345-l1-intc";
131 reg = <0x10000020 0x10>,
132 <0x10000030 0x10>;
133
134 interrupt-controller;
135 #interrupt-cells = <1>;
136
137 interrupt-parent = <&cpu_intc>;
138 interrupts = <2>, <3>;
139 };
140
141 wdt: watchdog@1000005c {
142 compatible = "brcm,bcm7038-wdt";
143 reg = <0x1000005c 0xc>;
144
145 clocks = <&periph_osc>;
146
147 timeout-sec = <30>;
148 };
149
150 gpio_cntl: syscon@10000080 {
151 #address-cells = <1>;
152 #size-cells = <1>;
153 compatible = "brcm,bcm6362-gpio-sysctl",
154 "syscon", "simple-mfd";
155 reg = <0x10000080 0x80>;
156 ranges = <0 0x10000080 0x80>;
157 native-endian;
158
159 gpio: gpio@0 {
160 compatible = "brcm,bcm6362-gpio";
161 reg-names = "dirout", "dat";
162 reg = <0x0 0x8>, <0x8 0x8>;
163
164 gpio-controller;
165 gpio-ranges = <&pinctrl 0 0 48>;
166 #gpio-cells = <2>;
167 };
168
169 pinctrl: pinctrl@18 {
170 compatible = "brcm,bcm6362-pinctrl";
171 reg = <0x18 0x10>, <0x38 0x4>;
172
173 pinctrl_usb_device_led: usb_device_led-pins {
174 function = "usb_device_led";
175 pins = "gpio0";
176 };
177
178 pinctrl_sys_irq: sys_irq-pins {
179 function = "sys_irq";
180 pins = "gpio1";
181 };
182
183 pinctrl_serial_led: serial_led-pins {
184 pinctrl_serial_led_clk: serial_led_clk-pins {
185 function = "serial_led_clk";
186 pins = "gpio2";
187 };
188
189 pinctrl_serial_led_data: serial_led_data-pins {
190 function = "serial_led_data";
191 pins = "gpio3";
192 };
193 };
194
195 pinctrl_robosw_led_data: robosw_led_data-pins {
196 function = "robosw_led_data";
197 pins = "gpio4";
198 };
199
200 pinctrl_robosw_led_clk: robosw_led_clk-pins {
201 function = "robosw_led_clk";
202 pins = "gpio5";
203 };
204
205 pinctrl_robosw_led0: robosw_led0-pins {
206 function = "robosw_led0";
207 pins = "gpio6";
208 };
209
210 pinctrl_robosw_led1: robosw_led1-pins {
211 function = "robosw_led1";
212 pins = "gpio7";
213 };
214
215 pinctrl_inet_led: inet_led-pins {
216 function = "inet_led";
217 pins = "gpio8";
218 };
219
220 pinctrl_spi_cs2: spi_cs2-pins {
221 function = "spi_cs2";
222 pins = "gpio9";
223 };
224
225 pinctrl_spi_cs3: spi_cs3-pins {
226 function = "spi_cs3";
227 pins = "gpio10";
228 };
229
230 pinctrl_ntr_pulse: ntr_pulse-pins {
231 function = "ntr_pulse";
232 pins = "gpio11";
233 };
234
235 pinctrl_uart1_scts: uart1_scts-pins {
236 function = "uart1_scts";
237 pins = "gpio12";
238 };
239
240 pinctrl_uart1_srts: uart1_srts-pins {
241 function = "uart1_srts";
242 pins = "gpio13";
243 };
244
245 pinctrl_uart1: uart1-pins {
246 pinctrl_uart1_sdin: uart1_sdin-pins {
247 function = "uart1_sdin";
248 pins = "gpio14";
249 };
250
251 pinctrl_uart1_sdout: uart1_sdout-pins {
252 function = "uart1_sdout";
253 pins = "gpio15";
254 };
255 };
256
257 pinctrl_adsl_spi: adsl_spi-pins {
258 pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
259 function = "adsl_spi_miso";
260 pins = "gpio16";
261 };
262
263 pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
264 function = "adsl_spi_mosi";
265 pins = "gpio17";
266 };
267
268 pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
269 function = "adsl_spi_clk";
270 pins = "gpio18";
271 };
272
273 pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
274 function = "adsl_spi_cs";
275 pins = "gpio19";
276 };
277 };
278
279 pinctrl_ephy0_led: ephy0_led-pins {
280 function = "ephy0_led";
281 pins = "gpio20";
282 };
283
284 pinctrl_ephy1_led: ephy1_led-pins {
285 function = "ephy1_led";
286 pins = "gpio21";
287 };
288
289 pinctrl_ephy2_led: ephy2_led-pins {
290 function = "ephy2_led";
291 pins = "gpio22";
292 };
293
294 pinctrl_ephy3_led: ephy3_led-pins {
295 function = "ephy3_led";
296 pins = "gpio23";
297 };
298
299 pinctrl_ext_irq0: ext_irq0-pins {
300 function = "ext_irq0";
301 pins = "gpio24";
302 };
303
304 pinctrl_ext_irq1: ext_irq1-pins {
305 function = "ext_irq1";
306 pins = "gpio25";
307 };
308
309 pinctrl_ext_irq2: ext_irq2-pins {
310 function = "ext_irq2";
311 pins = "gpio26";
312 };
313
314 pinctrl_ext_irq3: ext_irq3-pins {
315 function = "ext_irq3";
316 pins = "gpio27";
317 };
318
319 pinctrl_nand: nand-pins {
320 function = "nand";
321 group = "nand_grp";
322 };
323 };
324 };
325
326 uart0: serial@10000100 {
327 compatible = "brcm,bcm6345-uart";
328 reg = <0x10000100 0x18>;
329
330 interrupt-parent = <&periph_intc>;
331 interrupts = <BCM6362_IRQ_UART0>;
332
333 clocks = <&periph_osc>;
334 clock-names = "periph";
335
336 status = "disabled";
337 };
338
339 uart1: serial@10000120 {
340 compatible = "brcm,bcm6345-uart";
341 reg = <0x10000120 0x18>;
342
343 interrupt-parent = <&periph_intc>;
344 interrupts = <BCM6362_IRQ_UART1>;
345
346 clocks = <&periph_osc>;
347 clock-names = "periph";
348
349 status = "disabled";
350 };
351
352 nflash: nand@10000200 {
353 #address-cells = <1>;
354 #size-cells = <0>;
355 compatible = "brcm,nand-bcm6368",
356 "brcm,brcmnand-v2.2",
357 "brcm,brcmnand";
358 reg = <0x10000200 0x180>,
359 <0x10000600 0x200>,
360 <0x10000070 0x10>;
361 reg-names = "nand",
362 "nand-cache",
363 "nand-int-base";
364
365 interrupt-parent = <&periph_intc>;
366 interrupts = <BCM6362_IRQ_NAND>;
367
368 clocks = <&periph_clk BCM6362_CLK_NAND>;
369 clock-names = "nand";
370
371 pinctrl-names = "default";
372 pinctrl-0 = <&pinctrl_nand>;
373
374 status = "disabled";
375 };
376
377 lsspi: spi@10000800 {
378 #address-cells = <1>;
379 #size-cells = <0>;
380 compatible = "brcm,bcm6358-spi";
381 reg = <0x10000800 0x70c>;
382
383 interrupt-parent = <&periph_intc>;
384 interrupts = <BCM6362_IRQ_LSSPI>;
385
386 clocks = <&periph_clk BCM6362_CLK_SPI>;
387 clock-names = "spi";
388
389 resets = <&periph_rst BCM6362_RST_SPI>;
390
391 status = "disabled";
392 };
393
394 hsspi: spi@10001000 {
395 #address-cells = <1>;
396 #size-cells = <0>;
397 compatible = "brcm,bcm6328-hsspi";
398 reg = <0x10001000 0x600>;
399
400 interrupt-parent = <&periph_intc>;
401 interrupts = <BCM6362_IRQ_HSSPI>;
402
403 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
404 <&hsspi_osc>;
405 clock-names = "hsspi",
406 "pll";
407
408 resets = <&periph_rst BCM6362_RST_SPI>;
409
410 status = "disabled";
411 };
412
413 serdes_cntl: syscon@10001804 {
414 compatible = "syscon";
415 reg = <0x10001804 0x4>;
416 native-endian;
417 };
418
419 periph_pwr: power-controller@10001848 {
420 compatible = "brcm,bcm6362-power-controller";
421 reg = <0x10001848 0x4>;
422 #power-domain-cells = <1>;
423 };
424
425 leds: led-controller@10001900 {
426 #address-cells = <1>;
427 #size-cells = <0>;
428 compatible = "brcm,bcm6328-leds";
429 reg = <0x10001900 0x24>;
430
431 status = "disabled";
432 };
433
434 ehci: usb@10002500 {
435 compatible = "brcm,bcm6362-ehci", "generic-ehci";
436 reg = <0x10002500 0x100>;
437 big-endian;
438 spurious-oc;
439
440 interrupt-parent = <&periph_intc>;
441 interrupts = <BCM6362_IRQ_EHCI>;
442
443 phys = <&usbh 0>;
444 phy-names = "usb";
445
446 status = "disabled";
447 };
448
449 ohci: usb@10002600 {
450 compatible = "brcm,bcm6362-ohci", "generic-ohci";
451 reg = <0x10002600 0x100>;
452 big-endian;
453 no-big-frame-no;
454
455 interrupt-parent = <&periph_intc>;
456 interrupts = <BCM6362_IRQ_OHCI>;
457
458 phys = <&usbh 0>;
459 phy-names = "usb";
460
461 status = "disabled";
462 };
463
464 usbh: usb-phy@10002700 {
465 compatible = "brcm,bcm6362-usbh-phy";
466 reg = <0x10002700 0x38>;
467
468 #phy-cells = <1>;
469
470 clocks = <&periph_clk BCM6362_CLK_USBH>;
471 clock-names = "usbh";
472
473 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
474 resets = <&periph_rst BCM6362_RST_USBH>;
475
476 status = "disabled";
477 };
478
479 random: rng@10002880 {
480 compatible = "brcm,bcm6368-rng";
481 reg = <0x10002880 0x14>;
482
483 clocks = <&periph_clk BCM6362_CLK_IPSEC>;
484 clock-names = "ipsec";
485
486 resets = <&periph_rst BCM6362_RST_IPSEC>;
487
488 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_IPSEC>;
489 };
490
491 ethernet: ethernet@1000d800 {
492 compatible = "brcm,bcm6362-enetsw";
493 reg = <0x1000d800 0x80>,
494 <0x1000da00 0x80>,
495 <0x1000dc00 0x80>;
496 reg-names = "dma",
497 "dma-channels",
498 "dma-sram";
499
500 interrupt-parent = <&periph_intc>;
501 interrupts = <BCM6362_IRQ_ENETSW_RX_DMA0>;
502 interrupt-names = "rx";
503
504 clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>,
505 <&periph_clk BCM6362_CLK_SWPKT_SAR>,
506 <&periph_clk BCM6362_CLK_ROBOSW>;
507
508 resets = <&periph_rst BCM6362_RST_ENETSW>,
509 <&periph_rst BCM6362_RST_EPHY>;
510
511 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>,
512 <&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>;
513
514 dma-rx = <0>;
515 dma-tx = <1>;
516
517 status = "disabled";
518 };
519
520 switch0: switch@10e00000 {
521 #address-cells = <1>;
522 #size-cells = <0>;
523 compatible = "brcm,bcm6362-switch";
524 reg = <0x10e00000 0x8000>;
525 big-endian;
526
527 ports {
528 #address-cells = <1>;
529 #size-cells = <0>;
530
531 port@8 {
532 reg = <8>;
533
534 phy-mode = "internal";
535 ethernet = <&ethernet>;
536
537 fixed-link {
538 speed = <1000>;
539 full-duplex;
540 };
541 };
542 };
543 };
544
545 mdio: mdio@10e000b0 {
546 #address-cells = <1>;
547 #size-cells = <0>;
548 compatible = "brcm,bcm6368-mdio-mux";
549 reg = <0x10e000b0 0x8>;
550
551 mdio_int: mdio@0 {
552 #address-cells = <1>;
553 #size-cells = <0>;
554 reg = <0>;
555
556 phy1: ethernet-phy@1 {
557 compatible = "ethernet-phy-ieee802.3-c22";
558 reg = <1>;
559 };
560
561 phy2: ethernet-phy@2 {
562 compatible = "ethernet-phy-ieee802.3-c22";
563 reg = <2>;
564 };
565
566 phy3: ethernet-phy@3 {
567 compatible = "ethernet-phy-ieee802.3-c22";
568 reg = <3>;
569 };
570
571 phy4: ethernet-phy@4 {
572 compatible = "ethernet-phy-ieee802.3-c22";
573 reg = <4>;
574 };
575 };
576
577 mdio_ext: mdio@1 {
578 #address-cells = <1>;
579 #size-cells = <0>;
580 reg = <1>;
581 };
582 };
583
584 pcie: pcie@10e40000 {
585 compatible = "brcm,bcm6328-pcie";
586 reg = <0x10e40000 0x10000>;
587 #address-cells = <3>;
588 #size-cells = <2>;
589
590 device_type = "pci";
591 bus-range = <0x00 0x01>;
592 ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>;
593 linux,pci-probe-only = <1>;
594
595 interrupt-parent = <&periph_intc>;
596 interrupts = <BCM6362_IRQ_PCIE_RC>;
597
598 clocks = <&periph_clk BCM6362_CLK_PCIE>;
599 clock-names = "pcie";
600
601 resets = <&periph_rst BCM6362_RST_PCIE>,
602 <&periph_rst BCM6362_RST_PCIE_EXT>,
603 <&periph_rst BCM6362_RST_PCIE_CORE>;
604 reset-names = "pcie",
605 "pcie-ext",
606 "pcie-core";
607
608 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>;
609
610 brcm,serdes = <&serdes_cntl>;
611
612 status = "disabled";
613 };
614 };
615 };