target/linux/bcm4908/patches-5.15/035-v6.2-0002-arm64-dts-broadcom-bcmbca-bcm6858-add-TWD-block.patch

   1 From 4f9fb09175e87a233787a2dee1e5dabb14deb022 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
   3 Date: Thu, 3 Nov 2022 12:00:15 +0100
   4 Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm6858: add TWD block
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 BCM6858 contains TWD block with timers, watchdog, and reset subblocks.
  10 Describe it.
  11
  12 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
  13 Link: https://lore.kernel.org/r/20221103110015.21761-1-zajec5@gmail.com
  14 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  15 ---
  16  .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 19 +++++++++++++++++++
  17  1 file changed, 19 insertions(+)
  18
  19 --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
  20 +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
  21 @@ -109,6 +109,25 @@
  22                 #size-cells = <1>;
  23                 ranges = <0x0 0x0 0xff800000 0x62000>;
  24
  25 +               twd: timer-mfd@400 {
  26 +                       compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
  27 +                       reg = <0x400 0x4c>;
  28 +                       ranges = <0x0 0x400 0x4c>;
  29 +
  30 +                       #address-cells = <1>;
  31 +                       #size-cells = <1>;
  32 +
  33 +                       timer@0 {
  34 +                               compatible = "brcm,bcm63138-timer";
  35 +                               reg = <0x0 0x28>;
  36 +                       };
  37 +
  38 +                       watchdog@28 {
  39 +                               compatible = "brcm,bcm6345-wdt";
  40 +                               reg = <0x28 0x8>;
  41 +                       };
  42 +               };
  43 +
  44                 uart0: serial@640 {
  45                         compatible = "brcm,bcm6345-uart";
  46                         reg = <0x640 0x18>;